Parsec, an independent embedded-solutions specialist, uses XJTAG for testing prototypes and production boards, and for programming devices. Having previous experience of other boundary scan test systems, the company’s engineers appreciate the ease of use and time savings provided by features like the Schematic Viewer, Layout Viewer, and Chain Debugger.
Parsec, based in Centurion just outside Johannesburg, is a privately owned electronic engineering company that provides all-inclusive embedded subsystem design and manufacturing services to OEMs, system integrators, engineering companies and product suppliers. Founded in 1993, the company serves a global client base spanning defence and aerospace, telecommunications, and industrial market sectors.
Parsec engineers are familiar with boundary scan testing, and have experience with various types of systems. When the time came to invest in new equipment, Parsec chose XJTAG to aid debugging on complex digital design projects and to support production testing of a new design, a 3U OpenVPX processing board containing an FPGA, multi-core DSP and high-speed I/O pins. The engineering team is also using XJTAG to program on-board devices like microcontrollers, CPLDs and EEPROMs.
“XJTAG provides a good balance between price and performance, with outstanding functionality”, explains Piet du Toit, System Engineer, adding, “It is reliable, and significantly easier to use than our previous boundary scan tools”. He highlights XJTAG’s XJDeveloper graphical application as being particularly helpful for pinpointing faults quickly. “XJDeveloper is intuitive, and provides many features that help setup new projects and start testing boards quickly. The schematic and PCB-layout viewers are very useful for debugging.”
XJTAG’s Layout Viewer shows the physical locations of components, nets and pins. It can be launched from test results which describe the fault type and the net(s) involved, or from any device, net or pin in XJDeveloper. There is also a Schematic Viewer which can be launched from the same situations as Layout Viewer, and which allows users to check the logical connections between circuit elements from within the XJTAG environment, without having to change applications. There is also an intelligent netlist-search function that helps users to navigate to other elements of the circuit.
XJDeveloper provides further features that help speed up debugging and increase test coverage, such as the Advanced Connection Test which has clickable links to Schematic Viewer and Layout Viewer, tools for DFT analysis, support for the XJEase high-level test description language, and a software debugger that allows users to set breakpoints and watch variables in the test code.
Piet du Toit draws attention to another feature of XJTAG, which comes into its own if a fault exists with the JTAG chain of a prototype or production board. “A broken chain may prevent boundary scan tests from running properly. The JTAG Chain Debugger can exercise devices on the chain to try and identify the location of any faults.” As well as debugging broken chains, the tool also verifies that the correct BSDL files are present for all JTAG devices. “The Chain Debugger works well if there is a problem with the JTAG chain, and helps us move on quickly to test the rest of the board using the other powerful features of XJTAG.”
