JTAG Boundary Scan Test Systems (IEEE 1149.1)

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Can I run SVF / STAPL / JAM files in XJEase?

Yes. Look at the RUNSVF and RUNSTAPL commands in the XJEase help files.

I keep getting scan chain errors when running an XJEase script.

Ensure that you have correctly terminated the JTAG TAP signals at your board. See the DFT Guidelines document.

How do the timings work if a SET command involves more than one JTAG device?

A single SET command line will execute those pin settings off the same TCK edge, so they should both occur within the propogation delay from that edge.

Why can't I use "I" as a variable name?

"I" is a keyword in XJEase, and is used in the SET command.

The pin names in the BSDL file do not match those in my netlist.

Either the BSDL file or the netlist needs to be changed so that the pin names match. XJTAG provides a set of general purpose Perl scripts to perform this manipulation. The scripts are installed into the 'bin' directory in the XJTAG installation, and can be run from the XJTAG Command Prompt. For more information, look up "Pin numbers" in the help files.

My Xilinx SVF files don't work properly when I run them in XJTAG.

Some Xilinx SVF files assume a 1MHz clock speed, and have hard-coded delays in terms of number of clock cycles, rather than in terms of time. Set XJEase / XJAnalyser to run at 1MHz, or change the delays in your SVF file.

Where can I get example XJEase scripts?

There are lots of example scripts on this website. If you cannot find what you are looking for, email us.

Dynamic-width integers

XJEase supports dynamic-width integers, in contrast to conventional programming languages such as C++ and hardware description languages like Verilog or VHDL. Common uses for this powerful feature are manipulating, extracting and aligning data and address bit fields. This sort of operation is very useful when writing tests for Flash Memory, DDR RAM or other device types. XJEase dynamic-width integers can be up to 2^32 (over four billion) bits wide. Processing such large integers can reduce speed considerably so you need to take a little care with their use. This article describes how best to use dynamic-width integers.

The FLUSH command in XJEase

The FLUSH command allows you more control over the timings of JTAG writes. This application note describes a few examples of how it might be used.

The HOLDOFF command in XJEase

The HOLDOFF command allows you to speed up JTAG cycles by grouping sets of writes together. This application note gives an example of using it to meet timing constraints on an Atmel flash device.

Testing analogue ports with XJTAG

The IEEE1149.1 (JTAG) standard does not explicitly support the testing of analogue devices, but it is easily possible to test in-circuit analogue functions using XJTAG. This application note describes a real-world example of testing an analogue RGB video port, as a demonstration of the type of solution that can be used. This type of solution can be easily adapted to test a variety of analogue functions.

Troubleshooting the connection test

This application note covers problems seen when running the connection test, such as the "JTAG chain broken" error message, or current consumption suddenly increasing (meaning that there is a contention on the circuit).

It also includes more general searching for contentions/conflicts.

Generating serial numbers in XJEase

XJRunner can generate / read and log unique board identifiers during testing, such as serial numbers and MAC addresses. This application note describes how these should be handled by the XJEase code.

I'm having problems with backslashes '\' in XJEase strings.

\ is an escape character in XJEase. To get a literal backslash in an XJEase string, you need to use two backslashes.

Example

STRING MyFilePath1 := "c:\\projects\\MyBoard\\";

Alternatively, you can use forward slashes for file paths:

STRING MyFilePath2 := "c:/projects/MyBoard/";

How do I functionally test a JTAG device?

To functionally test a JTAG device, it must be kept in BYPASS mode during the device file tests:

JTAG LIST
    U1 := "myfile.bsdl" IN "BYPASS";
END;

You can then add the device to the TEST LIST section of the project file, and run tests on it in the same way as you would for a non-JTAG device.

How should I describe DDR termination resistors in XJEase?

There are two different styles of termination resistor found on a DDR memory; termination to a mid-supply voltage rail and differential termination.

DDR termination resistors that go to a mid-voltage supply rail can in most cases be categorised as "Ignore" devices. Because JTAG is a digital technology, it can only read 1 or 0, giving an indeterminate result for these resistors if they were to be classified as Pull resistors.

Differential termination resistors between the positive and negative clock signals should be described as passive devices in your XJDeveloper test system with a connection type of DIFF TERM.

Changing the Connection Test Fault Coverage

The XJTAG connection test is an automated interconnect test which checks for shorts, opens, stuck high and stuck low errors on a circuit board. Some circuit boards have cross-talk or similar issues, which do not affect the normal running of the board, but are picked up by the XJTAG connection test. To handle such boards, there are three debug options which can be used to change how the connection test runs. This application note describes these debug options.

Capabilities and Limitations of Logic Devices in an XJTAG test system

In circuits containing Logic Devices an XJTAG test system will automatically attempt to exercise those devices in the connection test, and may also use the devices to carry out SET statements in your XJEase Test Device Files. This is a highly useful feature which means the test designer does not usually need to worry about the connections between devices in the JTAG chain and the device being tested. However the automatic handling of Logic Devices does have certain limitations. This application note describes the capabilities and limitations of XJTAG's automatic set-up of logic gates.

XJTAG Ltd. © Copyright 2013. All rights reserved. Part of IEEE 1149.1