Master Your Prototype:
Testing Complex Reference Designs & Custom Boards
From evaluation kits to final production hardware – validate advanced peripheral components without writing firmware using XJTAG Boundary Scan.
Focus: Spartan UltraScale+ SU35P FPGA for industrial, medical, and data center I/O expansion.
Focus: Versal AI Edge Series Gen 2 adaptive SoC for AI-driven embedded systems.
More Platforms Arriving Soon
We regularly update our open hardware test libraries for emerging reference architectures.
Request my devboardSee What’s Possible for Your Custom Designs
Modern development boards are an important resource for firmware prototyping and provide a hardware references that you can use to accelerate your PCB design processes. Leading evaluation ecosystems, such as AMD Adaptive SoC and FPGA Evaluation Boards, combine complex processors and FPGAs with memories, high-density I/O and a wide range of peripheral components, similar to those you may require.
Fast Programming
Fast programming reduces frustration during development by allowing engineers to check their code more quickly on the hardware.
XJTAG systems offer production ready programming to help speed up firmware development/prototyping. XJFlash programming speeds are typically only limited by the embedded algorithms within the flash itself. These programming functions can then easily be transferred onto your custom designs, both during their bring-up and in mass production.
Board Test
Having a fully featured XJDeveloper project for your reference design means you are only a small step away from having the same capabilities available when you receive your first prototypes. XJTAG’s device-centric approach allows development board tests to be reused, or easily adapted for use on your board.
XJTAG uses Boundary Scan to control and monitor the state of the board so it does not require any firmware, much less functional firmware, so you can run the tests as soon as hardware is available.
Test High-Density Boards with Limited Access
High-value FPGAs and SoCs feature dense BGA packaging that hides hundreds of signal pins. XJTAG uses Boundary Scan to control and monitor these pins overcoming lack of physical test point access.
Detect Manufacturing and Connection Faults
Any board can suffer with manufacturing faults such as dry joints, shorts, and open circuits. Finding these issues is ever more challenging as design density increases.
XJTAG’s advanced Connection Test will automatically look for these faults using test patterns that are automatically generated (ATPG) from the netlist for the board and the BSDL files for the JTAG enabled devices.
Finds Faults Standard Tests Miss
XJTAG’s Connection Test algorithm still detects short circuits across nets that use inline resistors – a common blind spot for conflict-based interconnection tests.
Diagnostics as Standard
Every fault report includes the nets and pins involved, with direct links into the board’s layout and schematic to speed up repair.
Test Non-JTAG Devices and Peripherals
Not all devices on a board implement JTAG boundary scan, but this does not need to restrict test coverage.
XJTAG actively manipulates the boundary-scan registers to control pins on your primary processor or FPGA. By interacting with the peripheral devices XJTAG is validating their manufacturing integrity (before any firmware is running).
Memories
Verify connections to tricky parallel and serial storage components including DDRx/LPDDRx, HyperRAM, I2C/SPI EEPROMs, and SPI Flash.
Sensors, PHYs, Power Supplies …
Validate other functions on your board, such as Ethernet, accelerometers, temperature sensors, and power monitors using standard protocols such as I2C/SPI/MDIO.
Isolate Hardware vs. Firmware Issues
If prototype firmware behaves unexpectedly, use XJTAG as an independent sanity check. Quickly prove the underlying hardware and board connections are functioning correctly.
Accelerate Your Design Cycle: Test the Reference, Perfect the Custom PCB
By leveraging XJTAG Boundary Scan Testing on your evaluation platforms, you achieve two goals simultaneously:
- Confirm System Testability Early: Establish baseline test coverage standards using our built-in Design for Testability (DFT) guidelines.
- Code Reuse: The XJEase device test scripts used to communicate with memories, sensors, networking PHYs, and other devices on your evaluation kit can often be imported directly into your custom product design, or easily adapted where the hardware differs.