JTAG Boundary Scan Test Systems (IEEE 1149.1)

Using TI Devices with XJTAG

Introduction

Texas Instruments have a large range of JTAG-enabled devices. To use some of these devices, a few special considerations are required.

JTAG Connector

TI have a standard 14-way JTAG connector. The best way to connect the XJLink to this connector is to use a 14-way piece of ribbon cable, connecting pins 7-17 of the XJLink to pins 1-11 of the TI connector. Pins 18-20 of the XJLink should be connected to 12-14 of the TI connector, but with a twist such that XJLink Pin 18 goes to TI connector Pin 14:

Selecting JTAG Mode

Many TI devices have EMU signals, which are used to select between JTAG mode and Debug mode. To select JTAG mode, EMU0 and EMU1 must be low while nTRST is low, followed by a rising edge of TCK so that the the EMU signals are latched internally. XJTAG is able to support this requirement by using a TEST_RESET sequence. The XJEase pinmap code below describes both this sequence and the above pinmap.

MAPPING
  TMS  := 7;
  TRST := 8;
  TDI  := 9;
  TDO  := 13;
  TCK  := 17;
  LOW  := 10,12,14,18 HI;
  LOW  := 18,19;
END;

SEQUENCES
  SEQUENCE "TRST"
    SET TRST := 0, TCK := 0;
    SET TCK := 1;
    SET TCK := 0;
    SET TRST := 1;
    TMS_RESET;
  END;

  TEST_RESET := "TRST";
END;

The JTAG specification states that when a device enters Test_Logic_Reset mode, the ID code will be loaded into the Data register. Some devices don't support this method of reading the ID code but will work if nTRST is asserted. This sequence will make the device load the ID code (using nTRST) before entering the Test_Logic_Reset state (using a TMS reset). Without this sequence, XJTAG would default to following the JTAG specification, using just TMS to get to Test_Logic_Reset, as not all devices have to or do support nTRST.

A few TI devices don't load the ID code with either method. These devices appear to have a zero ID code and require the BSDL files for the them to be assigned manually in XJAnalyser.

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