Free XJTAG Boundary Scan Workshops
The full-day sessions are designed to provide design, development, test, and production engineers with a practical hands-on introduction to JTAG boundary-scan.
Introduction to JTAG – Concepts, Tools & Design for Test (DFT)
Find out how boundary scan can be used right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The workshop outlines the following:
- Overview of the IEEE 1149.x standards
- How to communicate with the JTAG chain
- Tools to interact with JTAG devices, such as FPGAs or BGAs
- Introduction to board testing using the JTAG chain
- How to describe a circuit in order to enable JTAG testing
- Fault finding abilities of a JTAG connection test
- How to test non-JTAG elements of a board design using boundary scan
To book your place, please fill in the following form. Places subject to availability and at the discretion of XJTAG.
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Boundary scan training worldwide
|13 October 2015 (Tuesday)||ASIC Design Services||Midrand||South Africa||More info|
|24 November 2015 (Tuesday)||FlowCAD||Zurich / Mägenwil||Switzerland||More info|
|26 November 2015 (Thursday)||FlowCAD||Munich / Feldkirchen||Germany||More info|
|1st Quarter 2016 (Date TBA)||XJTAG Headquarters||Cambridge||UK|