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Discover how a Leading Defense Manufacturer Cut Debug & Test Time by 20%

Image of CEO of XJTAG Simon Payne Simon Payne, CEO, XJTAG |  Subscribe to LinkedIn newsletter

Intro

A leading defense manufacturer that delivers complex, high-performance electronic platforms soon discovered that traditional testing methods simply couldn’t keep pace with the density of their modern designs. But as the company engineered its lastest embedded platform, traditional testing methods simply couldn’t keep up with the complexity of their densely populated boards. To accelerate development and improve test coverage, they turned to structured testing.

The Challenge

The defense manufacturer was developing a next‑generation embedded platform with high levels of integration and dense digital architecture. The complexity of this platform, combined with its use in demanding operational environments, made reliable test access a critical requirement.

These boards featured:

  • High pin‑count FPGA/BGA devices
  • Fine‑pitch high‑density connectors
  • Large programmable logic components
  • Dense multi‑layer architecture

All of which made traditional probing slow, unreliable, or impossible. Engineers needed a faster, more scalable way to debug and test both JTAG and non‑JTAG components.

The Turning Point

This leading defense manufacturer selected advanced boundary scan as its preferred platform for development, first article build, production, and field service, adopted both internally and by its manufacturing.

The engineering team quickly found that smarter structured testing provided a cost‑effective and highly intuitive way to get up and running fast, enabling engineers to move from setup to meaningful test coverage within hours rather than days.

Within hours, engineers achieved around 80% test coverage on complex digital circuitry-even on sections that were previously inaccessible.

Why It Works

Advanced boundary scan testing delivered a unified approach that worked across development, production, and support, removing much of the friction typically associated with complex board bring-up.

Key advantages:

  • Reusable device‑centric tests that work across multiple boards and future projects
  • Testing of JTAG and non‑JTAG devices through a high‑level structural test method scripting
  • Rapid programming of flash and other devices from development through production
  • Fast fault isolation in densely populated PCBAs
  • Portable structural test scripts that can be reused across different designs, reducing engineering effort and improving long-term maintainability

Results

  • ≈20% reduction in debug and test development time
  • 80%+ digital coverage achieved rapidly
  • Unified design‑for‑test strategy across development, first article build, production, and field service
  • Reusable scripts enabling faster future projects
  • Cost‑effective testing for boards containing large numbers of JTAG and non‑JTAG devices

The organisation also recognised that advanced boundary scan offered the speed, versatility, and cost‑effectiveness needed to support a unified design‑for‑test approach that could scale across the entire product lifecycle, from early development through production and ongoing support.

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“It’s Only a Small Board Change…” What Could Possibly Go Wrong? We recently spoke to an engineer about a new revision of an existing PCB. The message was: “It’s only an iterative change.” The implication was understandable: the design changes are small, so the additional test work should also be small. And they may be absolutely right. But it raises an important question: How do you know? A small PCB revision does not automatically mean a small test impact. How Much Test Work Does a Small PCB Revision Really Create? The answer depends less on how many things changed and more on what those changes affect. A reset signal may have moved. A buffer may have been added. A memory device may have been replaced. A previously unused FPGA pin may now be connected. A power rail or enable sequence may have changed. Each change may be small on the schematic, but if an existing test depends on it, the impact can be much greater. Every test makes assumptions about the hardware: which devices are fitted, how signals are connected, what can be controlled and observed, and how devices behave during test. Change one of those assumptions and the existing test may need to change too. What If the Change Is at the Centre of the Board? Now consider replacing the FPGA or processor at the heart of the design. Perhaps the new device performs essentially the same function and most of the surrounding circuitry is unchanged. It may look like a straightforward substitution. But that device may interact with a significant proportion of the board and therefore affect many existing tests. For teams using Boundary Scan, there is another important consideration: Is the BSDL file correct for the exact device and package now fitted? Boundary Scan software relies on the BSDL file to describe the device's pins, Boundary Scan cells, instructions and test capability. So a change that appears on the design change list as: “FPGA changed from A to B” could potentially affect considerably more of the existing test strategy than the change list initially suggests. This is why test effort isn't proportional to the number of changes. It depends on how central those changes are to the tests already developed. Regression Testing Isn't Just for Software Software engineers are familiar with regression testing. A small code change doesn't mean rewriting the entire application, but it does mean understanding what else could have been affected. PCB test deserves the same approach. For every revision, ask: What changed? Which existing tests depend on it? Which assumptions are still valid? Which tests can remain unchanged? Which tests need modifying? Is any additional test coverage required? The objective isn't to assume everything has changed. It's to avoid assuming nothing has. Reuse Should Still Be the Goal Last week, we looked at the value of reusing tests developed during bring-up through production, repair and support. A new board revision shouldn't change that principle. Good reusable tests should make iterative development easier. The aim is to preserve everything that remains valid and concentrate engineering effort only on the tests affected by the new design. Reuse the test — but validate the assumptions behind it. That is far more efficient than designing a complete test strategy again for every PCB revision. Closing Thought “It’s only an iterative change” may be completely true. And the additional test-development work may genuinely be trivial. But that should be the conclusion of an impact review, not the assumption at the start of one. When the next PCB revision is released, ask: What changed? Which of our existing tests depend on those changes? Are the assumptions behind those tests still valid? Then preserve everything that still works. The objective isn't to design a complete test from scratch. It's to know which tests need changing — and why. Board Design Tip of the Week When documenting your next PCB revision, add one more item to the change list: Test impact. For each design change, consider whether it affects: Component functionality or pinout Signal routing or connectivity Resets, enables or mode settings Power rails or sequencing Interfaces and control signals Physical test access Programming or configuration Existing test assumptions And if Boundary Scan forms part of your test strategy, also check whether the change affects the BSDL/device model or JTAG architecture. A short review at this stage can prevent a “small change” from becoming an unexpected test-development problem when the revised boards arrive. Discover more about your board design with the Free XJTAG Layout Viewer. To get started find out how the Free XJTAG Layout Viewer can help you see on your board: Download your Free XJTAG Layout Viewer today
Don’t Throw Away the Tests That Got Your Prototype Working The first prototype arrives and the engineering team begins the process of proving the hardware. Connections are checked. Memories are exercised. Peripherals are tested. Problems are found, understood and fixed. Eventually, the board works. And then something slightly strange can happen. Much of the test capability that helped get it working is never used again. Bring-Up Creates More Than a Working Board During bring-up, engineers build up a significant amount of knowledge about the hardware. They learn how to initialise devices. They discover which signals need to be controlled. They find ways of checking memories and peripherals. They work out how to distinguish between a software problem and a hardware problem. Sometimes this knowledge becomes a formal test. Sometimes it is a small utility written by one engineer. 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Turn Engineering Knowledge into Something Repeatable There is an important difference between knowing how to test something and having a test that someone else can run. If an engineer manually performs a sequence of checks during bring-up, that knowledge may disappear when the project moves on. If the same procedure is documented and automated where practical, it becomes reusable. That means the effort invested during development can continue providing value. Instead of every new team starting again, the product carries some of its diagnostic knowledge with it. Boundary Scan Is Particularly Well Suited to Reuse Boundary Scan can be especially useful here because structural tests are based on the hardware and its connectivity rather than depending entirely on the final application software. A test created to verify connections between devices during bring-up can potentially verify those same connections during manufacturing. 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Structural tests developed during prototype bring-up don't necessarily need to be discarded once the design is working. Tests that proved connectivity, memories, peripherals or interfaces during development may also provide useful coverage in production. That means the effort invested in understanding the first prototypes can potentially become part of the manufacturing test strategy. Instead of starting again, knowledge moves forward with the product. Closing Thought A string of passing boards doesn't really test your diagnostic strategy. The first failure does. That is when you discover whether your test simply detects a problem or actually helps the engineer understand it. And the difference between knowing: “This board failed.” and: “This is where you should start looking.” can determine whether the problem is diagnosed in minutes, investigated for hours or placed on a growing bone pile marked: Investigate later. The best production tests don't just catch faults. They help engineers understand them. Board Design Tip of the Week Before releasing your next design, choose three realistic manufacturing faults. For example: An open connection beneath a BGA A short between two adjacent signals An incorrectly fitted peripheral Then ask: “If this happened on the production line, what would our test actually tell us?” If the answer is simply: FAIL there may still be work to do. Discover more about your board design with the Free XJTAG Layout Viewer. To get started find out how the Free XJTAG Layout Viewer can help you see on your board: Download your Free XJTAG Layout Viewer today