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How Does Boundary Scan Know How Your Board Is Connected?

Image of CEO of XJTAG Simon Payne Simon Payne, CEO, XJTAG |  Subscribe to LinkedIn newsletter

The C word stands for Connections – because understanding what is connected to what is fundamental to understanding your PCB. When something doesn’t behave as expected, knowing the intended connections, and being able to test them, can turn thousands of individual nets into meaningful information that helps engineers quickly understand what’s happening on the board.

Over the past few weeks, we’ve explored how Boundary Scan works, why it’s built into so many semiconductor devices and how software uses BSDL (Boundary Scan Description Language) files to understand each device’s Boundary Scan capabilities.

But another question naturally follows.

How does the software know how all of those devices are connected together?

After all, knowing how a boundary scan device works is only part of the picture.

To test a board, you also need to understand the board itself.

One Source of Truth

Every PCB design starts as a schematic, which is much more than a simple drawing of components connected by lines.

The schematic is the authoritative description of the hardware design.

It is used to understand circuit intent, verify interfaces, support development, investigate faults, and confirm that the assembled hardware matches the intended design.

It describes how every device on the PCB is intended to interact with every other device.

It defines:

  • Nets
  • Components
  • Pin connections
  • Signal names
  • Power domains
  • Interfaces

For Boundary Scan software, it’s equally important.

From Devices to the Board

The schematic tells the engineer how devices are connected together. The netlist generated from the schematic tells the Boundary Scan software how the devices connect together.

JTAG devices are described by BSDL files. Non-JTAG devices are modelled or assigned reusable library files.

Only when these three pieces of information are combined does the Boundary Scan software gain a complete understanding of the hardware.

It can determine:

  • Which Boundary Scan devices share signals
  • Which non-JTAG devices are connected to them
  • Which nets can be driven
  • Which signals can be observed

This transforms a collection of individual devices into a complete board model.

Turning Design Information into Tests

One of the strengths of Boundary Scan software is that it can use this information to generate meaningful structural tests.

Rather than engineers manually describing every connection, the software understands the design and can automatically determine how many of those connections can be verified. This dramatically reduces the effort required to begin testing a design.

More importantly, it allows engineers to concentrate on understanding the results rather than creating the tests themselves.

More Than Just Connectivity

Understanding the schematic also makes fault diagnosis far more meaningful. When a problem is detected, software doesn’t simply report that a pin has failed.

It can identify:

  • The signal name
  • The devices involved
  • The location of the connection
  • The surrounding circuitry

Instead of raw data, engineers receive information they can immediately relate to the design.

That often makes the difference between spending hours interpreting results and understanding the problem within minutes.

Who Does This Benefit

Hardware engineers can use it to debug a design during bring-up and early validation.

Manufacturing teams can use it to quickly diagnose assembly and connectivity faults on the production line.

Test and support engineers rely on it to isolate issues in the field without needing full system access or software to be running.

By working from the same design data used across the engineering lifecycle, Boundary Scan ensures that structural tests remain aligned with the intended behaviour of the product from design through to deployment.

Building on the Design Process

One of the themes we’ve explored throughout this series is reducing uncertainty.

Every stage of Boundary Scan builds on information that already exists.

The semiconductor manufacturer provides the BSDL file. The hardware team creates the schematic / netlist. Boundary Scan software combines those sources to produce meaningful structural tests.

Nothing is guessed. Everything is based on the intended design.

Closing Thought

Boundary Scan is often described as a test technology.

In reality, it is much more than that.

It is a way of transforming the design information already available within a project into practical engineering insight.

The better the software understands the board, the more effectively it can help engineers validate, debug and support it throughout its lifecycle.

Board Design Tip of the Week

Treat your schematic as more than a design document.

It is also the foundation for bring-up, structural testing, manufacturing and long-term support.

Keeping schematics accurate, complete and well organised doesn’t just help during design reviews, it helps every engineer who works on the product throughout its lifetime.

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“It’s Only a Small Board Change…” What Could Possibly Go Wrong? We recently spoke to an engineer about a new revision of an existing PCB. The message was: “It’s only an iterative change.” The implication was understandable: the design changes are small, so the additional test work should also be small. And they may be absolutely right. But it raises an important question: How do you know? A small PCB revision does not automatically mean a small test impact. How Much Test Work Does a Small PCB Revision Really Create? The answer depends less on how many things changed and more on what those changes affect. A reset signal may have moved. A buffer may have been added. A memory device may have been replaced. A previously unused FPGA pin may now be connected. A power rail or enable sequence may have changed. Each change may be small on the schematic, but if an existing test depends on it, the impact can be much greater. Every test makes assumptions about the hardware: which devices are fitted, how signals are connected, what can be controlled and observed, and how devices behave during test. Change one of those assumptions and the existing test may need to change too. What If the Change Is at the Centre of the Board? Now consider replacing the FPGA or processor at the heart of the design. Perhaps the new device performs essentially the same function and most of the surrounding circuitry is unchanged. It may look like a straightforward substitution. But that device may interact with a significant proportion of the board and therefore affect many existing tests. For teams using Boundary Scan, there is another important consideration: Is the BSDL file correct for the exact device and package now fitted? Boundary Scan software relies on the BSDL file to describe the device's pins, Boundary Scan cells, instructions and test capability. So a change that appears on the design change list as: “FPGA changed from A to B” could potentially affect considerably more of the existing test strategy than the change list initially suggests. This is why test effort isn't proportional to the number of changes. It depends on how central those changes are to the tests already developed. Regression Testing Isn't Just for Software Software engineers are familiar with regression testing. A small code change doesn't mean rewriting the entire application, but it does mean understanding what else could have been affected. PCB test deserves the same approach. For every revision, ask: What changed? Which existing tests depend on it? Which assumptions are still valid? Which tests can remain unchanged? Which tests need modifying? Is any additional test coverage required? The objective isn't to assume everything has changed. It's to avoid assuming nothing has. Reuse Should Still Be the Goal Last week, we looked at the value of reusing tests developed during bring-up through production, repair and support. A new board revision shouldn't change that principle. Good reusable tests should make iterative development easier. The aim is to preserve everything that remains valid and concentrate engineering effort only on the tests affected by the new design. Reuse the test — but validate the assumptions behind it. That is far more efficient than designing a complete test strategy again for every PCB revision. Closing Thought “It’s only an iterative change” may be completely true. And the additional test-development work may genuinely be trivial. But that should be the conclusion of an impact review, not the assumption at the start of one. When the next PCB revision is released, ask: What changed? Which of our existing tests depend on those changes? Are the assumptions behind those tests still valid? Then preserve everything that still works. The objective isn't to design a complete test from scratch. It's to know which tests need changing — and why. Board Design Tip of the Week When documenting your next PCB revision, add one more item to the change list: Test impact. For each design change, consider whether it affects: Component functionality or pinout Signal routing or connectivity Resets, enables or mode settings Power rails or sequencing Interfaces and control signals Physical test access Programming or configuration Existing test assumptions And if Boundary Scan forms part of your test strategy, also check whether the change affects the BSDL/device model or JTAG architecture. A short review at this stage can prevent a “small change” from becoming an unexpected test-development problem when the revised boards arrive. Discover more about your board design with the Free XJTAG Layout Viewer. To get started find out how the Free XJTAG Layout Viewer can help you see on your board: Download your Free XJTAG Layout Viewer today
Don’t Throw Away the Tests That Got Your Prototype Working The first prototype arrives and the engineering team begins the process of proving the hardware. Connections are checked. Memories are exercised. Peripherals are tested. Problems are found, understood and fixed. Eventually, the board works. And then something slightly strange can happen. Much of the test capability that helped get it working is never used again. Bring-Up Creates More Than a Working Board During bring-up, engineers build up a significant amount of knowledge about the hardware. They learn how to initialise devices. They discover which signals need to be controlled. They find ways of checking memories and peripherals. They work out how to distinguish between a software problem and a hardware problem. Sometimes this knowledge becomes a formal test. Sometimes it is a small utility written by one engineer. Sometimes it is little more than a sequence of commands, measurements or notes that helped prove a particular part of the board. But whatever form it takes, it has value. The question is: What happens to it once the prototype works? A Test Shouldn't Necessarily Be Used Only Once Some bring-up tests are naturally temporary. But many aren't. If a test helped prove that an interface was correctly connected on the first prototype, there may be no reason why the same test cannot help verify that interface again later. The purpose simply changes. During bring-up, the question might be: “Did we design this correctly?” During production: “Has this particular board been assembled correctly?” During repair: “Which part of this board is no longer behaving correctly?” Different stages of the product lifecycle. But often the same underlying hardware evidence is useful. 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A test used to exercise a memory, peripheral or other accessible device may remain useful during fault diagnosis. The reason for running the test changes. The physical hardware being checked does not. That gives structural tests the potential to move with the product from development into production and later support. Don't Lose the Tests at Handover When a product moves from development into manufacturing, the handover typically includes things such as: Schematics PCB data BOMs Manufacturing information Firmware Programming files Test specifications It is worth asking whether the diagnostic capability developed during bring-up should be treated in exactly the same way. Which tests proved particularly useful? Which interfaces can be independently verified? Which procedures helped isolate previous faults? Which tools or scripts should be retained? If that knowledge stays with one engineer rather than moving with the product, its value can easily be lost. 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Your Board Already Has a Powerful PCB Test Capability The design has been verified, production starts, the first boards come through test successfully. Then one fails. That is the moment you discover how good your test strategy really is. Finding a fault on a prototype is one thing. The development team knows the design intimately, has access to schematics, debug software and bench equipment, and may be prepared to spend hours investigating an unusual problem. Production is different. When a manufactured board fails, the question isn't simply: “Does it work?” It becomes: “What's wrong with this particular board, and how quickly can we find the fault?” Prototype Debugging and Production Diagnosis Are Different During development, engineers are often investigating the design itself. Is the interface configured correctly? Does the circuit behave as expected? Are the component values right? Does the software initialise the hardware correctly? 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But when a functional test fails, the symptom can sometimes cover a large area of hardware. Structural testing provides a different layer of evidence. Boundary Scan can often verify inaccessible PCB connections independently of the application software and relate unexpected results back to the nets and devices involved. That can help answer an important question: Is this an assembly problem, and if so, where should we investigate first? Boundary Scan does not replace functional production testing. It complements it by providing another way to understand the hardware beneath the symptom. One Failed Board May Be Manageable If one board fails, spending an hour investigating it may not seem significant. But what happens when ten fail? Or fifty? Or when the same type of fault appears repeatedly? At that point, diagnostic time starts affecting manufacturing throughput. That is why the economics of production test aren't determined only by how quickly passing boards can be tested. They are also influenced by how efficiently failed boards can be diagnosed. A fast PASS/FAIL test followed by hours of fault finding may not be as efficient as it first appears. Don't Wait for the First Failure to Think About Diagnosis There is an important Design for Test lesson here. When the first failed production board arrives, the PCB design is already complete. If a reset cannot be controlled, an enable is inaccessible or an important interface cannot be exercised independently, the test engineer has to work within those constraints. The opportunity to make a simple schematic change may have disappeared months earlier. This is why testability shouldn't only ask: “Can we detect a failure?” It should also ask: “If it fails, what information will we have?” That question is much easier to answer while the schematic is still open. Carry What You Learned During Bring-Up into Production There is another opportunity that is often overlooked. Structural tests developed during prototype bring-up don't necessarily need to be discarded once the design is working. Tests that proved connectivity, memories, peripherals or interfaces during development may also provide useful coverage in production. That means the effort invested in understanding the first prototypes can potentially become part of the manufacturing test strategy. Instead of starting again, knowledge moves forward with the product. Closing Thought A string of passing boards doesn't really test your diagnostic strategy. The first failure does. That is when you discover whether your test simply detects a problem or actually helps the engineer understand it. And the difference between knowing: “This board failed.” and: “This is where you should start looking.” can determine whether the problem is diagnosed in minutes, investigated for hours or placed on a growing bone pile marked: Investigate later. The best production tests don't just catch faults. They help engineers understand them. Board Design Tip of the Week Before releasing your next design, choose three realistic manufacturing faults. For example: An open connection beneath a BGA A short between two adjacent signals An incorrectly fitted peripheral Then ask: “If this happened on the production line, what would our test actually tell us?” If the answer is simply: FAIL there may still be work to do. Discover more about your board design with the Free XJTAG Layout Viewer. To get started find out how the Free XJTAG Layout Viewer can help you see on your board: Download your Free XJTAG Layout Viewer today