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What Engineers Actually Do When FPGA Bring-Up Gets Stuck

Image of CEO of XJTAG Simon Payne Simon Payne, CEO, XJTAG |  Subscribe to LinkedIn newsletter

Over the years, we’ve had many conversations with engineers working on FPGA systems at different stages of development.

Different industries, different devices and different applications.

But interestingly, when bring-up gets stuck, the behaviour is often very similar.

What Typically Happens

The system doesn’t behave as expected.

  • The FPGA won’t configure
  • Interfaces don’t respond
  • Something just doesn’t feel right

So the investigation begins.

A natural first step is to focus on the part of the system that appears to be failing:

  • looking at a specific interface
  • examining a particular signal path
  • trying to debug that area directly

That’s a completely reasonable approach, it’s how most engineers start solving problems.

The Role of Bring-Up

At its core, board bring-up is about proving that everything is working correctly and completely as expected.

And along the way, problems will inevitably appear.

When they do, the task becomes understanding why there is a mismatch between what is expected and what is actually happening.

A Slightly Different Approach

One pattern we’ve seen in experienced teams is a small but important shift in how they approach these situations.

Instead of immediately diving deeper into the failing area, they step back and ask:

“What do we know is working?”

From there, they begin to build a picture of the system based on what has already been proven:

  • Which devices are accessible?
  • Which paths are known to be correct?
  • Which parts of the board are behaving as expected?

This allows them to start ruling things out.

Why This Helps

Focusing only on the failing area can sometimes narrow the investigation too quickly.

By contrast, starting from what is known to work helps define the boundaries of the problem.

It becomes easier to see:

  • what the issue is likely related to
  • what it cannot be related to
  • and where to focus effort next

This doesn’t replace problem solving, it makes it more efficient.

Closing Thought

Bring-up is fundamentally about proving that a system behaves exactly as intended.

And when it doesn’t, systematically identifying where that expectation breaks down.

Often, the fastest way to do that is not to go straight into the problem itself, but to use what is already known to be working to guide the investigation.

FPGA Board-Level Tip of the Week

Design flexibility into JTAG and configuration circuitry from the start.

Why it matters:

  • Board bring-up and debugging often require configuration or signal adjustments that weren’t originally anticipated
  • Missing termination or fixed configuration options can limit your ability to diagnose issues
  • Small design decisions early can significantly affect flexibility later

What to do:

  • Include pads for all potentially required termination components on JTAG signals (pull-ups, parallel termination and series resistors)
  • Provide options to configure JTAG chain behaviour where devices may be optional or removed
  • Design configuration mode pins so they can be set to either state, even if only one mode is expected initially

What to watch out for:

  • Hard-wiring configuration modes without fallback options
  • Omitting termination options to save space or cost
  • Board revisions where flexibility has been reduced unintentionally

Building in these options upfront makes the board far more versatile and avoids situations where a small change is needed, but no longer possible once the hardware is built.

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