The 2 to 3 hour sessions are designed to provide design, development, test, and production engineers with a practical hands-on introduction to JTAG boundary scan, using real hardware. You will have remote access to a full XJTAG development system to give you the experience of actively developing and running boundary scan tests.
The webinar will be run by an experienced engineer (all you need is a web browser). No prior knowledge of JTAG is required.
Further hardware access time will be made available afterwards, should you wish to review the workshop content.
Register for upcoming dates
Introduction to JTAG – Concepts, Tools & Design for Test (DFT)
Learn the basics of boundary scan and how you can use it right across the product lifecycle to improve designs, reduce respins and enhance test coverage, fault diagnosis and production yields on complex BGA-populated circuits. The next workshop outlines the following:
- Overview of the IEEE 1149.x standards
- How to communicate with the JTAG chain
- Tools to interact with JTAG devices, such as FPGAs or Processors
- Introduction to board testing using the JTAG chain
- How to describe a circuit in order to enable JTAG testing
- Fault finding abilities of a JTAG connection test
- How to test non-JTAG elements of a board design using boundary scan
Workshops are free of charge by registration.
To book your place, please go to the top of the page.
(Places subject to availability and at the discretion of XJTAG.)
Very much enjoyed the workshop. If only all the free one-day workshops could be as useful, relevant and information-packed as XJTAG’s! Having the tools and hardware to play with was invaluable.
Peter Sarginson, Digital Design Engineer, Broadcast Sports International