JTAG Boundary Scan Test Systems (IEEE 1149.1)

XJTAG Support

Knowledge Base

Find answers to your questions about XJTAG. If you have a question that isn't covered here, please contact support. This section also includes application notes.

Contact Support

XJEase Example Code

Example XJEase files for a range of non-JTAG device types. Includes code for the XJDemo board, as well as Ethernet loopback, Video, Memory tests, etc.

XJEase Library

Get boards running quickly with the installed XJEase library.

Updates

If you have a support account, you can download the latest version of XJTAG. If you have lost your account details, contact us.

If you do not have a support account, you can apply for one, as long as you are currently in maintenance.

Learn about JTAG

We have a range of resources to help you learn about the background of JTAG, how it can be used in many different ways, and details about its implementation.

• BSDL files - links to manufacturers' websites
• High-Level Guide to JTAG
• Technical Guide to JTAG
• Testing with XJTAG
• BGA devices
• Connection testing
• In-system programming
• Testing non-JTAG devices
• SVF files

DFT Guidelines

Using our Design-for-Test Guidelines, you can make sure that as much of your circuit as possible is testable with JTAG.

Product Datasheets

White Paper

• High Speed Programming of Non-Volatile Memories  –  English    |  日本語  

Application Notes

• Testing analogue ports with XJTAG
• Non-standard cell types in BSDL files
• What is the FLUSH command used for?
• What is the HOLDOFF command used for?
• Using a Test Reset section to initialise JTAG devices
• Guide to using Dynamic Width Integers in XJEase
• Using XJTAG with differential signals
• Using TI devices with XJTAG
• How to modify your XJEase project to work with XJRunner
• Generating serial numbers in XJEase
• Adding a custom GUI to XJEase or XJRunner
• Changing the Connection Test fault coverage
• Working with configured Xilinx and Altera devices
• Clearing Xilinx FPGA configuration to allow boundary scan testing
• Capabilities and Limitations of Logic Devices in an XJTAG test system