How Much of Your PCB Can Boundary Scan Actually Test?

Simon Payne, CEO, XJTAG | Subscribe to LinkedIn newsletter

Over the last few editions of Testing Times, we’ve followed the journey from the Boundary Scan capability built into semiconductor devices through to the creation of practical structural tests.

The devices provide the access.

BSDL files describe that access.

The PCB design data explains how everything is connected.

Boundary Scan software brings that information together and turns it into tests.

But once those tests have been created, another question becomes very important:

How much of the PCB can actually be tested?

The answer isn’t simply determined by how many JTAG devices are on the board. In many cases, the reach of Boundary Scan extends considerably further.

It Starts with Access

Boundary Scan testing fundamentally depends on two things:

Can a signal be controlled?

And:

Can its behaviour be observed?

Consider a simple connection between two Boundary Scan-enabled devices.

If one device can drive the signal and the other can observe it, the connection can potentially be tested without the application running and without physically probing the PCB.

That is the most obvious example of Boundary Scan coverage.

But it is only the beginning.

Extending Test Coverage Beyond JTAG.

The test doesn’t have to end at another JTAG device, this is an important point because it changes how we think about Boundary Scan coverage.

Suppose an FPGA with Boundary Scan is connected to a memory device that has no JTAG capability.

The memory doesn’t suddenly become inaccessible simply because it isn’t part of the JTAG chain.

The FPGA’s Boundary Scan logic may still provide control of the signals connected to that memory.

If those signals can be exercised in a meaningful way, the memory and its connections can also become part of the test strategy.

The same principle can apply to many other devices on the board.

Boundary Scan Can Reach Into the Surrounding Circuitry

Depending on the design, Boundary Scan-enabled devices can provide access to:

Memories
Flash devices
SPI peripherals
I²C devices
Ethernet PHYs
GPIO circuitry
DACs
ADCs
LEDs and switches
Other digital and mixed-signal circuitry

The Boundary Scan device effectively becomes an access point into the surrounding hardware.

That means the useful test coverage of a board can extend well beyond the components that actually contain Boundary Scan logic.

Different Circuits Require Different Tests

Not every part of the PCB is tested in the same way.

A connection between two Boundary Scan devices might be tested structurally by driving patterns across the nets and observing the results.

A memory requires a different approach.

Its address, data and control signals may be exercised to perform read and write operations.

A DAC might be set to generate a known output.

An ADC might be used to measure a voltage.

An Ethernet PHY might be configured and checked to determine whether a link becomes active.

These are different tests, but they can all make use of the access provided through the JTAG-enabled devices already present on the board.

This is why Boundary Scan coverage is about much more than counting JTAG-to-JTAG connections.

Coverage Isn’t Just a Percentage

It’s tempting to describe test coverage with one number.

Perhaps:

“We have 85% coverage.”

But that number alone doesn’t necessarily tell you very much.

Eighty-five percent of what?

Components?

Nets?

Pins?

Connections?

Functions?

A more useful question is:

What areas of the board can we establish confidence in, and what remains untested?

That distinction matters during bring-up and manufacturing.

Knowing that a section of the board has been structurally verified can be just as valuable as knowing where coverage is limited.

It allows engineers to focus other test methods on the parts of the design where they are actually needed.

Boundary Scan Is Part of a Test Strategy

No single test technology is likely to prove everything on a complex PCB.

Boundary Scan isn’t intended to replace functional testing.

It doesn’t replace oscilloscopes, flying probes, in-circuit test or other diagnostic techniques.

What it does provide is another layer of evidence.

And because it can often operate before the application software is available, it can provide that evidence remarkably early in the product lifecycle.

The objective isn’t necessarily to test everything using Boundary Scan.

The objective is to use the access already available on the board to establish as much confidence as possible.

Design Decisions Make a Difference

There is another important aspect to test coverage.

It isn’t completely fixed.

Decisions made while the PCB is being designed can significantly influence how much hardware will later be accessible to Boundary Scan testing.

For example, the choice of semiconductor devices, the way signals are connected, the structure of the JTAG chain and the accessibility of control signals can all affect the eventual test strategy.

Two boards containing similar components can therefore have very different levels of testability.

The difference may simply be that one was designed with test access in mind from the beginning.

Knowing the Gaps Is Valuable Too

A good test strategy should not pretend that everything is covered.

It should make the gaps visible.

If Boundary Scan software can show which connections and devices are testable and which are not, the engineering team can make informed decisions about how those remaining areas will be validated.

Perhaps they require functional software.

Perhaps they require physical probing.

Perhaps another test method is more appropriate.

Or perhaps the design should be changed before the board reaches production.

Understanding the gaps before you need to diagnose a fault is considerably better than discovering them afterwards.

Closing Thought

The value of Boundary Scan isn’t determined by the number of JTAG devices on your schematic.

It’s determined by how effectively the access provided by those devices can be used to understand the hardware around them.

A single FPGA or processor may provide visibility into a surprisingly large area of the PCB.

And when that capability is considered during the design stage, the resulting test coverage can become an important part of the product’s bring-up, manufacturing and long-term support strategy.

The question isn’t simply “Does my board have JTAG?”

A much better question is:

“How much confidence can I build using the JTAG access I’ve already got?”

Board Design Tip of the Week

Before releasing a PCB design, review Boundary Scan test coverage while changes are still inexpensive.

Look at which important interfaces can be controlled and observed, which non-JTAG devices can be accessed through neighbouring Boundary Scan devices, and where significant gaps remain.

A small schematic change made before layout is complete can sometimes provide test access that would be impossible to add once the board has been manufactured.