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What Is Boundary Scan. And Why It Is Already On Your PCB

Image of CEO of XJTAG Simon Payne Simon Payne, CEO, XJTAG |  Subscribe to LinkedIn newsletter

Over the last few weeks, we’ve explored why JTAG exists, how it helps engineers gain visibility into increasingly complex hardware, and how structural testing complements software-based bring-up.

Many engineers use JTAG every day to program, configure or debug FPGAs and  processors. Fewer realise that many of those same semiconductor devices already contain dedicated hardware designed specifically to help test and debug the board itself.

That capability is called Boundary Scan.

More Than Just JTAG

JTAG and Boundary Scan are often mentioned together, and it’s easy to assume they mean the same thing, they don’t.

JTAG is the standardised interface that allows engineers to communicate with compatible semiconductor devices. Boundary Scan is one of the capabilities that can be accessed through that interface.

In simple terms, JTAG is the doorway, Boundary Scan is one of the powerful tools behind that door.

A Clever Idea

Imagine every digital input and output pin on a semiconductor device had a small piece of dedicated test logic associated with it. Instead of relying on the processor executing software or the FPGA running its design, engineers could use that test logic to directly observe or control the logic level at those pins.

That is the fundamental idea behind Boundary Scan.

By placing dedicated test logic around the edge, or boundary, of the device, engineers gain a way to interact with signals independently of the device’s normal operation.

It is a remarkably simple idea that has had a profound impact on board-level testing.

Why It Was Developed

As semiconductor devices evolved, packages became smaller, pin counts increased and Ball Grid Array (BGA) packages became commonplace. Many signals could no longer be accessed using traditional test probes. Boundary Scan was developed to solve exactly this problem.

Rather than requiring physical access to every connection, engineers could use the test logic already built into the semiconductor device to help verify the PCB interconnections.

This made it possible to investigate hardware that would otherwise be extremely difficult to access.

In some cases, such as when using blind vias between BGAs, this can be the only test access to nets without having to create bespoke test code for the device.

It Doesn’t Need the Application to Be Running

One of the characteristics that makes Boundary Scan particularly valuable during board bring-up is that it operates independently of the application software.

If a processor has failed to boot…

If an FPGA has not yet been configured…

Or if the operating system has never started…

Boundary Scan can often still provide valuable information about the hardware itself.

That allows engineers to begin building confidence in the board long before the application is capable of running.

Looking Beyond the Device

One of the biggest surprises for engineers new to Boundary Scan is that its usefulness extends well beyond the semiconductor device itself. The signals driven and observed through the Boundary Scan logic continue into the PCB.

That means engineers can investigate the interconnections between devices and, in many cases, establish confidence in much larger sections of the board than they might expect.

Importantly, this also means that JTAG-enabled devices can be used to test connections to devices that do not support JTAG themselves. By driving and observing signals through the Boundary Scan logic, engineers can verify connectivity to non-JTAG components such as memories, peripherals and other discrete devices.

The reach of Boundary Scan testing doesn’t have to stop there. This interaction with non-JTAG components can also be used to actively control them for example, setting DAC output values or reading ADC inputs, allowing engineers to extend testing even further beyond the Boundary Scan device itself.

Boundary Scan is not simply about testing the device. It is about helping engineers understand the hardware around it.

Unlocking the Capability

Having Boundary Scan logic built into a semiconductor device is only part of the story. The capability still needs to be accessed, understood and applied in a practical way.

That requires software capable of communicating with the JTAG chain, understanding the devices on the board, interpreting their Boundary Scan descriptions, and translating that information into meaningful engineering tasks such as connectivity testing, device programming and fault diagnosis.

Much like a software debugger helps engineers understand and control running code, specialised Boundary Scan tools help engineers unlock the structural test capability already built into many modern semiconductor devices. Without those tools, much of that capability remains largely untapped.

A Foundation for Modern Hardware Debug

Over the years, semiconductor manufacturers have incorporated Boundary Scan into an enormous number of devices, including:

  • FPGAs
  • Processors
  • SoCs
  • CPLDs
  • Ethernet PHYs

As a result, countless electronic systems already contain the hardware needed to support structural testing. The capability already exists within the silicon, the opportunity lies in making practical use of it.

Closing Thought

Most engineers are familiar with JTAG. Far fewer have explored what Boundary Scan can actually do.

Yet it has become one of the key technologies that helps engineers establish confidence in complex electronic hardware. Not by replacing software, not by replacing functional testing. But by providing another way to understand the board when answers are needed most. The capability is already there. The real challenge is unlocking it in a way that provides meaningful insight into the hardware.

Board Design Tip of the Week

When selecting major semiconductor devices, don’t just consider processing power or logic resources. Also consider the test and debug capabilities they provide.

Boundary Scan is already built into many modern devices, and designing your board so that this capability remains accessible can pay dividends throughout bring-up, manufacturing, debugging and long-term support.

Providing access to the capability is only the first step.

Making effective use of it is where the real value begins.

Explore your board design with the Free XJTAG Layout Viewer

To get started find out how the Free XJTAG Layout Viewer can help you see your board connections:

Download your Free XJTAG Layout Viewer today

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