Test engineers face increasing pressure as board designs are becoming more densely populated with devices that have little or no access to their pins, and the space for test points is under pressure. SPEA has taken a lead in the test market, offering their clients a one stop solution by integrating boundary scan with its world renowned flying-probe and bed-of-nails testers.
Each new generation of boards increases the challenge to maintain high levels of test coverage, as PCBs become more complex and densely populated, fewer test points are provided, and new component package styles compromise the ability to probe I/O pins. To ensure continuous improvement and that testing Ball Grid Array (BGA) devices on dense boards does not impact test coverage, SPEA has introduced boundary scan testing on its bed-of-nails and flying probe testers.
Boundary scan permits testing of devices and connections on nets connected to JTAG-compatible components on the board, via a conveniently located test port. Where device I/O pins are inaccessible, or test points are not available, boundary scan enables engineers to maintain a high level of test coverage. Boundary scan is also able to generate accurate diagnostics that can pinpoint the locations of any faults that are detected.
SPEA and XJTAG engineers have worked together to ensure superior performance on the combined test platform, in order to provide best-in-class test capability and optimum value for customers.
“Boundary scan testing has several key strengths that complement SPEA’s expertise in the electronics test market,” explains Stefano Ghibò, Technical Sales Specialist at SPEA. “XJTAG is powerful and easy to use, which enables us to maximise the advantages of built-in boundary scan for our customers.”
“To complete the integration of boundary scan and in-circuit test functionality, the SPEA team has re-optimised the overall test strategy to optimise test cycle times. The combined system also implements a test coverage report that blends the data from the different test techniques.”
Stefano Ghibò describes the support provided by engineers from both companies as paramount to help clients with their projects. “Our engineers are readily available to answer customers’ questions, and help them to maximise their test coverage for boards under test.”
Testing times may be ahead as electronic circuits become more complicated; however, the collaboration between leading suppliers is not only helping address the challenges facing engineers today but is also creating test solutions fit for the future.