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In the News

U.S. TECH – March 2017

JTAG Integrated with PCB Design Tools Broadens Capabilities

Many engineers think that JTAG is simply an interface for inserting breakpoints to debug the software running on a CPU. It may surprise them to learn that JTAG is included in many integrated devices that do not have a debug interface. While this includes FPGAs and CPUs, it also extends to memory, communication interfaces and even general logic devices.

JTAG is so prevalent that in the majority of designs there will be at least one JTAG device on a board, and even a single JTAG-compliant device can be enough to make significant test coverage possible. Boundary scan is not limited to testing JTAG-enabled devices, however …

XJTAG News Article in US Tech March 2017
CAO.fr – November 2016

Cadence intègre XJTAG DFT Assistant dans OrCAD Capture

San Jose, Californie, le 8 novembre 2016 – Cadence Design Systems (NASDAQ: CDNS), leader mondial de l’innovation en conception électronique, annonce que sa solution OrCAD Capture intègre à présent l’outil XJTAG DFT Assistant, une interface simple d’emploi qui augmente de façon significative les possibilités de conception en vue du test (Design for Test — DFT) et du débogage de son outil de capture schématique et de conception de circuits imprimés.

Développée par XJTAG, fournisseur d’outils logiciels et matériels « boundary-scan », l’interface XJTAG DFT Assistant permet de détecter et de corriger les erreurs JTAG sur les cartes électroniques au stade de la conception, c’est-à-dire avant l’entrée en production. Cette intervention effectuée en amont évite de procéder à des coûteuses reprises, ainsi que de retarder les projets en cours.

Also available in: 日本語, Français
XJTAG Cadence Case Study
Cadence – November 2016

Cadence Releases XJTAG DFT Assistant for OrCAD Capture

SAN JOSE, CA, USA, Nov. 8, 2016 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its OrCAD® Capture has been enhanced to now include XJTAG® DFT Assistant, an easy-to-use interface that significantly increases the design for test (DFT) and debug capabilities of the schematic capture and PCB design system. Developed by boundary-scan hardware and software tool supplier XJTAG, XJTAG DFT Assistant allows users to detect and correct JTAG errors at the design stage before the PCB is produced, preventing costly re-spins and project delays.

Also available in: 日本語, Français
XJTAG Cadence Case Study
Nikkei – November 2016

米ケイデンス・デザイン・システムズ、OrCAD Capture向けXJTAG DFT Assistantを発表

2016年11月8日、米国カリフォルニア州サンノゼ市 — ケイデンス・デザイン・システムズ社(NASDAQ: CDNS)は、OrCAD® Captureが、回路図入力およびプリント基板設計システムのDesign For Test(DFT)及びデバッグ機能を大幅に向上する利便性の高いインターフェイスであるXJTAG® DFT Assistantを統合し、強化されたことを発表しました。

バウンダリスキャンのハードウェア、およびソフトウェアツールを供給するXJTAG社によって開発されたXJTAG DFT Assistantによって、PCB製造前の設計段階でJTAG不具合を検出し修正することができるようになり、設計のリスピンやプロジェクトの遅延を回避することが可能になります。

Also available in: 日本語, Français
XJTAG Cadence Case Study
Electronic Specifier – May 2016

Automating Product Development, From Design Through To Manufacture And Test

Increasing design automation requires an appreciation for the challenges incurred and complexities involved at every stage of product development. EDA tools targeting complete product design offer many benefits, including the ability to increase functionality through extensions and plug-ins.

Also available in: Deutsch, Français, Svenska
XJTAG article in Electronic Specifier May 2016
Electronic Specifier – May 2016

Automatiser le développement de produits, de la conception à la fabrication, en passant par les essais

L’automatisation croissante du travail de conception impose d’évaluer les défis encourus et les complexités qui en découlent à chacune des étapes du développement de produits. Les outils de CAO électronique qui ciblent l’intégralité de la conception de produits offrent de nombreux avantages, y compris la capacité d’accroître les fonctionnalités grâce à des extensions et à des plug-ins.

Also available in: Deutsch, Français, Svenska
XJTAG article in Electronic Specifier May

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