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In the News

New Electronics – October 2017

Getting it right at the design stage

JTAG is implemented in CPUs, programmable devices and the other ICs that typically form the heart of any electronic product; however, its potential is often overlooked. Until now, design tools didn’t include any way to verify the JTAG system at the design stage. For the first time, engineering can validate proactively the test access to their designs from within their CAD application and before any hardware is produced, preventing costly respins and delays.
Article in New Electronics - XJTAG DFT Assistant
U.S. TECH – July 2017

Beyond Debug: XJTAG for Flash Programming and Board Test

The JTAG standard defines an electrical and physical method for connecting JTAG-enabled devices on a PCB, or across multiple PCBs. However, the technology behind the interface differs significantly from a standard communications interface. JTAG effectively turns every pin on the device into a virtual test point, accessed electronically, which is extremely useful for debugging a prototype board. These virtual test points, accessible without a dedicated test fixture, mean that even first prototypes can be tested using JTAG, on a bench or even by the manufacturer.
XJTAG News Article in US Tech July 2017
U.S. TECH – March 2017

JTAG Integrated with PCB Design Tools Broadens Capabilities

Many engineers think that JTAG is simply an interface for inserting breakpoints to debug the software running on a CPU. It may surprise them to learn that JTAG is included in many integrated devices that do not have a debug interface. While this includes FPGAs and CPUs, it also extends to memory, communication interfaces and even general logic devices. JTAG is so prevalent that in the majority of designs there will be at least one JTAG device on a board, and even a single JTAG-compliant device can be enough to make significant test coverage possible. Boundary scan is not limited to testing JTAG-enabled devices, however ...
XJTAG News Article in US Tech March 2017
Cadence – November 2016

Cadence Releases XJTAG DFT Assistant for OrCAD Capture

SAN JOSE, CA, USA, Nov. 8, 2016 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its OrCAD® Capture has been enhanced to now include XJTAG® DFT Assistant, an easy-to-use interface that significantly increases the design for test (DFT) and debug capabilities of the schematic capture and PCB design system. Developed by boundary-scan hardware and software tool supplier XJTAG, XJTAG DFT Assistant allows users to detect and correct JTAG errors at the design stage before the PCB is produced, preventing costly re-spins and project delays.
Also available in: 日本語, Français
XJTAG Cadence Case Study
Electronic Specifier – May 2016

Automating Product Development, From Design Through To Manufacture And Test

Increasing design automation requires an appreciation for the challenges incurred and complexities involved at every stage of product development. EDA tools targeting complete product design offer many benefits, including the ability to increase functionality through extensions and plug-ins.
Also available in: Deutsch, Français, Svenska
XJTAG article in Electronic Specifier May 2016
Sensors Online – March 2016

Meeting The Challenge Of The IoT

With as many as 25 million new devices coming online every single day over the next five years, the Internet of Things will require an unprecedented improvement in manufacturing and testing efficiency.
XJTAG Article

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