22 February 2018
Zuken® and XJTAG® release free design for test (DFT) plugin to enhance Zuken’s CR-8000 Design Gateway at Embedded World 2018 in Nuremberg, Germany. XJTAG DFT Assistant helps to validate correct JTAG chain connectivity, while displaying boundary scan access and coverage onto the schematic diagram through full integration with CR-8000. The plugin incorporates JTAG testability as part of the design process before any hardware is produced, by reporting any potential design issues. Being able to validate the design early helps engineers avoid board re-spins and costly delays to a project.
08 November 2017
XJTAG and Systech Europe, a leading European provider of electronic test solutions, today announced the availability of an integrated solution using XJTAG boundary scan and Takaya’s flying probe system.
28 September 2017
XJTAG has launched a major update to its flagship software, XJDeveloper. V3.6 includes several new productivity and automation-focused enhancements, allowing engineers to setup tests for even the most complex boards in significantly less time.
19 July 2017
Zuken® and XJTAG® have entered into a partnership to enhance Zuken’s CR-8000 with a design for test (DFT) capability that will improve test coverage during schematic entry. The capability is based on XJTAG’s DFT Assistant, and will be available later this year as a free plugin for Zuken’s CR-8000 Design Gateway users.
06 June 2017
XJTAG signs a joint Technology Partner Agreement with Flying Test Systems, a leading provider of electronic test solutions in the UK and Ireland. Flying Test Systems offer electronic circuit board test and repair services, Design for Test (DFT) consultancy services along with in-circuit, SPEA flying probe and bespoke functional test equipment for production. The company has a large installed base of clients across defence, aerospace, automotive, medical, industrial & semiconductor throughout the UK.
14 March 2017
Mentor Graphics PADS products now include the XJTAG DFT Assistant that provides engineers with a free, easy to use Design-For-Test (DFT) interface to check if JTAG chains are correctly connected and terminated at the schematic capture stage, long before the PCB is produced.