Your Device Has JTAG. But Can You Actually Use It?
Simon Payne, CEO, XJTAG
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November 4, 2026
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Many engineers select an FPGA, processor or SoC and see JTAG support listed in the device specification.
That sounds reassuring.
The capability is there.
But there is an important catch:
If the PCB design doesn’t provide practical access to that JTAG interface, much of the value has already been lost before the first board is built.
And that can mean giving up access to one of the most useful diagnostic capabilities already built into the silicon.
JTAG Is Easy to Overlook During Design
When a new PCB is being developed, there is a lot competing for attention. DDR, PCIe, Ethernet, Clocks, Power, High-speed interfaces and Peripherals. Compared with those, JTAG can look relatively unimportant.
It may be seen simply as something required to program an FPGA or connect a processor debugger. And if programming is going to happen through another mechanism, it can be tempting to think:
“We don’t really need JTAG on the finished board.”
That decision may remove considerably more capability than expected.
JTAG Is More Than a Programming Interface
Programming and processor debug are probably the most familiar uses of JTAG.
But, as we’ve explored throughout Testing Times, many modern semiconductor devices also contain Boundary Scan logic. That can give engineers access to the signals around the device independently of the application software.
With the right board design, that access may help verify PCB connectivity, investigate memories and peripherals, exercise control signals and establish confidence in hardware before the application is even running.
The semiconductor manufacturer has already provided much of this capability inside the device. The PCB designer decides whether it remains accessible.
The Capability Is Already There
This is an important point.
Adding JTAG access doesn’t mean adding an entirely new test technology to the design.
For many devices, the hardware is already in the silicon.
The design task is largely about making sensible provision for using it.
That might mean routing the JTAG signals to a connector, test pads or another accessible interface.
On a more complex board, it may mean considering how several devices should be arranged into one or more JTAG chains.
The incremental design effort can be small.
The potential value later can be considerable.
Think Beyond the First Prototype
The obvious time to value JTAG access is during bring-up.
If the processor doesn’t boot or the FPGA application isn’t ready, JTAG and Boundary Scan may provide another route into the hardware. But its usefulness doesn’t necessarily stop once the prototype works.
The same access can potentially support:
- Programming and configuration
- Development and debug
- Structural testing
- Manufacturing test
- Failure analysis
- Repair and rework
- Long-term product support
A connector that seems unnecessary during schematic capture may become extremely useful several years later when someone has to diagnose a board that no longer behaves as expected.
Don’t Just Put the JTAG Pins on the Schematic
Providing JTAG access requires a little more thought than simply connecting TCK, TMS, TDI and TDO.
During design, it is worth asking:
- Where will the interface actually be accessed?
- Are all the devices you may want to reach included in a usable chain?
- What happens if one device is unpowered or not fitted?
- Are suitable pull resistors and termination options provided?
- Can relevant mode or configuration pins be placed into the required state?
- Would several JTAG chains provide better flexibility on a complex system?
- Will JTAG still be accessible on the production board?
These are relatively easy questions to answer before layout. They become much harder to solve once assembled PCBs are sitting on the bench.
What Happens If You Don’t Route It Out?
Perhaps nothing.
The board may work perfectly.
The firmware may work first time.
Production may run smoothly.
But if something does go wrong, one useful source of visibility is no longer available.
A processor that won’t boot becomes harder to investigate.
An FPGA board with incomplete firmware may provide fewer diagnostic options.
A production failure may need to be approached entirely through functional testing or physical probing. The problem isn’t that the product suddenly cannot be tested. It is that an existing diagnostic option has been designed away.
Closing Thought
Seeing “JTAG supported” in the device datasheet isn’t enough.
The semiconductor manufacturer has provided the capability.
The PCB designer decides whether anyone will actually be able to use it.
Routing JTAG access may occupy only a very small part of the schematic.
But it can provide useful visibility throughout the life of the product.
And the easiest time to preserve that capability is before the PCB exists.
Board Design Tip of the Week
If you’re providing JTAG access, build in a little flexibility rather than designing only for the configuration you expect to use today.
Consider providing footprints for appropriate JTAG pull resistors and termination components, even if some are initially left unpopulated. Where device configuration or mode pins can affect JTAG operation, consider providing resistor options that allow those states to be changed if necessary.
And if a permanent JTAG connector isn’t desirable on the production PCB, consider retaining accessible test pads or another practical connection method.
Those small provisions cost very little at the design stage, but they can give engineers considerably more options during bring-up, test and fault diagnosis later.
Could JTAG boundary scan help you test your next design?
Discover how boundary scan can help you improve test coverage, diagnose faults faster and simplify board testing:
Find out more about JTAG boundary scan and how it can help you.
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