XJTAG Professional Development System unveiled at Electronica

  • XJTAG Professional enables design engineers to significantly reduce the time and cost of board development and prototyping
  • Test coverage and speed of fault detection enhanced due to host of new features including an improved interconnect test which can exercise over 5,000 nets in less than a second due to sophisticated and mathematically-proven algorithms
  • COM Interface added to allow XJTAG to integrate with test executives such as LabVIEW, Visual Basic, and other Windows-based custom applications
  • Visit XJTAG at Electronica (Hall A1/Stand 259), November 14-17, New Munich Trade Fair, Germany

MUNICH, Germany, November 14, 2006 – XJTAG (www.xjtag.com), a leading supplier of boundary scan development tools, has unveiled its XJTAG Professional development system and announced a plethora of enhancements to its award-winning IEEE 1149.1 compliant system – all designed to enable engineers to significantly reduce the time and cost of board development and prototyping.

The XJTAG Professional system brings together all the elements within XJTAGs extensive suite of development tools to provide engineers with an ‘out-of-the-box’ solution for debugging and testing complex printed circuits featuring high pin count ball grid array (BGA) devices, which cannot be tested by traditional methods such as flying probes, logic analyzers, oscilloscopes and X-ray systems. XJTAG Professional includes XJAnalyser, XJEase, XJRunner, XJLink, XJDemo and the new XJIO board.

“The XJTAG system is designed by engineers for engineers and provides a comprehensive set of tools to test, debug and program complex printed circuits containing BGA devices,” said Simon Payne, CEO of XJTAG. “With the Professional system and the new features, board developers will be able to get their circuits up and running in hours as opposed to days/weeks with other systems.”

Test coverage, speed of fault detection and overall usability has been greatly enhanced in the latest version of XJTAG. The interconnect test is now lightning fast and can exercise 5,000 nets in less than a second due to improvements to the sophisticated and mathematically-proven algorithms. It can also identify a higher proportion of faults and, importantly, accurately report their locations.

XJEase has also been enriched in the latest version with extra language features added to make the whole test script writing process more intuitive and natural. In addition, extending the principle of device-centricity which underpins XJEase, test code is now separated from the configuration files making it much easier and quicker to make wholesale changes to test routines.

XJTAG has also added a COM Interface to the system to allow XJTAG to integrate with test executives such as LabVIEW, Visual Basic and other Windows-based custom applications. Other new features include enhancements to XJAnalyser to speed up debugging, and a new XJDemo board, which shows how, using XJEase, engineers can test the analogue elements of their circuits.

The XJTAG system reduces the time and cost of board development and prototyping by facilitating early test development, early design validation of CAD netlists, fast generation of highly functional tests and test re-use across circuits that utilise the same devices. XJTAG enables engineers to test a high proportion of the circuit (both boundary scan and cluster devices) including BGA and chip scale packages, such as SDRAMs, Ethernet controllers, video interfaces, Flash memories, field programmable gate arrays and microprocessors.

XJTAG abstracts engineers from the complexity of the IEE1149.1 standard. It is simple and easy to use, test scripts are written in a C-like programming language, and these scripts are device-centric making them re-usable throughout the product lifecycle from early design and prototyping through to production, field support and repair. XJTAG also enables In-System Programming of FPGAs, CPLDs (Complex Programmable Logic Devices) and Flash memories.

The XJTAG Professional Development System incorporates the following components. XJAnalyser is a powerful tool for circuit visualisation that provides a simple graphical view of the state of all JTAG pins. XJEase is the test description language for manipulating non-JTAG/cluster devices. XJRunner is a production optimised version of the XJTAG Development System, designed specifically for contract manufacturers and production sites.

XJLink is a USB 2.0 hardware module used to connect the computer with the unit under test and contains the XJTAG license, which allows the system to be used on different computers on and off site. XJDemo is a fully populated demonstrator board, with tutorials designed to provide the developer with a rapid understanding of the XJTAG system and how to simulate faults. The XJIO board improves the test coverage for a Unit Under Test (UUT) by verifying the signals right through to the external connections.

For more information about the XJTAG Development System, please contact XJTAG, St John’s Innovation Centre, Cowley Road, Cambridge, CB4 0DS, UK. Telephone +44 (0) 1223 223007, fax +44 (0) 1223 223009 or email enquiries@xjtag.com. Alternatively visit www.xjtag.com.

Visit XJTAG at Electronica (Hall A1/Stand 259) November 14-17, New Munich Trade Fair, Germany.

About XJTAG (www.xjtag.com)

XJTAG is a specialist design and test tool developer. Its JTAG (Joint Test Action Group) development system offers a competitive solution for designers and developers of electronic circuits. Utilising XJTAG allows the circuit development and prototyping process to be shortened significantly by facilitating early test development, early design validation, fast development of functional tests and test re-use across circuits that use the same devices. The company is based in the UK at St John’s Innovation Centre, Cowley Road, Cambridge. XJTAG is part of the Cambridge Technology Group (www.cambridgetechgroup.com).

What is JTAG?

Advances in silicon design, such as increasing device density and, more recently, ball grid array (BGA) and chip scale packaging, have reduced the efficacy of traditional electronic circuit testing methods. In order to overcome these problems and others; some of the world’s leading silicon manufacturers combined to form the Joint Test Action Group (JTAG). The findings of this group were used as the basis for the Institute of Electrical and Electronic Engineers (IEEE) standard 1149.1: Standard Test Access Port and Boundary Scan Architecture and subsequently the standard became known as JTAG.

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