XJTAG Makes Boundary Scan Project Creation Easier & Faster

Cambridge, England, March 28, 2023 — XJTAG® announces a new release of its world-leading JTAG boundary scan tools. XJTAG 3.13 offers engineers several benefits –

  • Efficiency: this release introduces an efficient way to deal with build variants (i.e. assembled boards that use a common PCB layout but have component differences).
  • Time: a new algorithm can reduce test development time by detecting I2C devices and creating basic tests for them automatically.
  • Simplicity: handling of power and ground nets during test project creation is simplified.
  • Clarity: engineers can now increase the clarity of their instructions by adding images to the message boxes and dialogs displayed for operators.

XJTAG 3.13 Deals Easily with Build Variants

This latest software release makes it quicker and easier to manage build variants. It’s now possible to create a single baseline project and then to define how each variant differs from that baseline. Importing BOM files for each variant allows you to use a wizard that compares the baseline BOM to the imported one and makes proposals on which devices have changed and how to adjust the boundary scan test. There is also a manual method for use with variants that don’t have their own BOM files.

To run tests in production, test setups containing the necessary data for individual variants can be exported separately, or the variant to be tested can be selected at runtime from a drop-down menu.

Add Images to Your Dialogs

You can now bring extra clarity to operator instructions by including images in your message boxes and input boxes. For example, rather than only using text to describe where to fit a loopback connector, you can now illustrate your guidance with an animation that demonstrates it being fitted, or with a photograph showing it in place.

Repair personnel can also benefit because it enables a way to locate components on the board when an ODB++ netlist isn’t available. With XJTAG 3.13, tests could be written to display a picture if a board error is found. The image could be of the board with the devices highlighted that are relevant to the detected fault.

The image types supported are JPEG, PNG, GIF (including animated), BMP, and TIFF.

Automatic Detection and Faster Test Creation for I2C Devices

XJTAG 3.13 speeds up the creation of test projects by using a new algorithm that aims to detect when a device you’re working with has an I2C interface. When one is found, all the basic aspects of setting up I2C devices can now be performed automatically. The detection algorithm works by inspecting the names of nets connected to the device, looking for one containing the text “SCL” and another containing “SDA”. In addition, if another I2C device has already been set up, the software will check for connections to that device’s bus.

When the test development system recognises that the device uses I2C, it now offers to create a basic test for the device automatically if it doesn’t already have one in its library. The resulting test will check that the device acknowledges its address, and engineers can then build upon that basic test if required by adding their own device-specific tests.

Faster Checking of XJDeveloper’s Automated Power and Ground Net Analysis

XJTAG’s latest software release also changes how the development system presents results from its attempt to find the circuit’s power and ground nets. Several different algorithms are still used to identify these nets, but the findings are now combined into a single list, with each identified net given a score to indicate the degree of confidence in the suggestion that it’s power or ground.

The quoted figure is calculated based upon the net’s name, the number of capacitors on the net, and the types of devices connected to it – for example, components that look like inductors or pull-resistors increase the score.

These scores make it easy to find the nets that truly are power, even when they’re not given obvious names. This helps you easily exclude other nets when telling the system which ones to treat as power or ground.

Summary of XJTAG 3.13

In summary, with XJTAG 3.13, test projects can be created faster thanks to the test development system’s ability to create basic tests for I2C devices automatically, the new way that results from its search for power and ground nets are presented, and the support for build variants. Engineers can now also improve the content of their message and dialog boxes by adding images.

Updating to XJTAG 3.13

This latest software is now available for download from www.xjtag.com for existing clients with a valid maintenance contract. XJTAG can be contacted on +44 (0)1223 223007, via email at enquiries@xjtag.com, or through its worldwide network of distributors. More information can be found at www.xjtag.com.

About XJTAG (www.xjtag.com)

XJTAG is a world leading supplier of JTAG boundary-scan hardware and software tools. Its products use IEEE Std.1149.x (JTAG boundary scan) to enable engineers to debug, test, and program electronic circuits quickly and easily. This can significantly shorten the electronic design, development, and manufacturing processes. XJTAG focuses on innovative product development and high-quality technical support. For more information about the company, its products, and its services, please visit www.xjtag.com.

About JTAG

JTAG is an IEEE standard that was developed to address the difficulties of testing circuits that use packaging technologies such as Ball Grid Arrays and Chip Scale Packages, where solder connections aren’t accessible to traditional bed-of-nails testers. Although JTAG has since become popular for processor debug and for programming FPGAs and CPLDs, they only make use of the standard’s communications protocol. The full benefit of the JTAG standard comes from its introduction of boundary scan techniques for testing and debugging assembled boards; XJTAG’s tools give you an easy way to use those capabilities. Read more about JTAG here.

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