Testing non-JTAG Devices
Once the physical integrity of the circuit has been verified and devices appropriately programmed, functionality can be tested.
Non-JTAG-compliant sections of a circuit can be tested by using the interconnecting nets between the devices in the JTAG chain and other devices in the circuit.
This form of testing is often applied to a group, or cluster, of non-JTAG devices in the circuit. It works on the principle of setting the nets attached to the JTAG devices to pre-defined levels, then reading back a set of values and comparing them to those expected.
Memory Testing
One variant of this method is memory testing. A sequence of JTAG test signals is created to manipulate the address and data busses of a memory device so as to write information into memory, then a second set of test signals is created to read this information back. This can apply to SRAM, SDRAM, Flash memory or any variant.
Other Possibilities
If any non-JTAG device is connected to a JTAG device, its functionality and/or connections can be tested to some extent. For instance:
- External Connectors
- Video chips
- IIC devices
- Ethernet Controllers
- LEDs
- Switches
- and many more...
See our Example scripts to find out how to test your non-JTAG devices using XJEase.
