XJDeveloper is an Integrated Development Environment for JTAG test development and execution. Through its intuitive design flow, engineers have easy access to XJTAG’s market-leading interconnection and functionality-based testing technology. This is supported by a large built-in library of device tests, combined with the ability to easily develop additional tests. Advanced fault analysis and visualisation tools are included as standard. XJDeveloper also supports In-System Programming (including XJFlash) of both JTAG devices (e.g. CPLDs and FPGAs) and non-JTAG devices (EEPROMs, flash memory).
XJDeveloper gives engineers easy access to the functionality defined in IEEE 1149 (JTAG). This standard can be used throughout the entire product lifecycle to bring the benefits of boundary scan testing to any product, however complex. Projects are focussed on the devices being tested. XJTAG’s powerful processing technology automatically creates the low-level test vectors without the user needing to know how to construct them. Test coverage can be viewed at any point in the project setup to assess setup progress or see how the design can be improved. When the project is complete, XJDeveloper can create XJRunner projects for testing and programming on the production line.
XJDeveloper can be used to run tests during prototype bring-up without the need for any application code to be ready. Using the same user interface that will later be used for production line testing ensures a smooth test flow from prototype debug to production test.
XJDeveloper supports all of the test capabilities of XJTAG’s full product line-up, to give you full flexibility for all of your JTAG testing requirements.
Boundary scan testing using XJDeveloper starts with XJTAG’s Advanced Interconnection Test. This is able to test a higher percentage of a circuit than most other JTAG solutions, and is automatically generated from the data given during test setup. The interconnection test provides the core of the test coverage for your board, checking JTAG-accessible nets for short-circuit, stuck-high/stuck-low faults, and open-circuit errors. The test includes checks for missing pull-up/pull-down resistors and resistive short-circuit errors. It also dynamically drives the logic devices in the circuit, giving test coverage to the nets which are accessible to JTAG only through logic devices.
XJEase model library
After the interconnection test, XJTAG continues by running tests written in the XJEase language, that are normally from XJTAG’s built-in test library. The tests use the functionality of the devices on the board to verify that they are present and connected correctly. Because XJEase is a fully-featured programming language, these tests are dynamic, and are written to react to the conditions they find on the board.
XJTAG’s library tests are device-centric – they are specific to the type of device being tested but not to the circuit they are placed in, or to the JTAG devices that are used to drive the nets on the PCB. This means that tests can simply be added to the project and re-used without modification whenever that type of device is re-used in other projects. Over time, this greatly reduces the engineering costs of project setup with XJTAG.
As a user, you can access the source code for each test provided in XJTAG’s library, and the full-range of XJEase debugging facilities in XJDeveloper. It is therefore possible to verify the operation of the tests, modify them, or adapt them for new or future device types.
The main purpose of a JTAG test system is to detect faults in PCB assemblies, but the true value of this system is in its ability to accurately identify the cause of the faults.
XJDeveloper can find and identify a wide range of faults. Information about the faults can be combined with imported Netlist and Schematic diagrams to graphically show the nets exhibiting faults. Nets can be highlighted on both the Schematic Diagram and the PCB layout, using XJDeveloper’s viewer tools. The Schematic Viewer and Layout Viewer are also accessible in XJRunner, XJTAG’s production test environment, and XJInvestigator, the advanced fault diagnosis/rework station.
These powerful features, provided as standard, take fault analysis to a new level. Being able to see all of the points on a net where a short-circuit may have occurred due to a manufacturing defect, for example, can save valuable time in rework.
In-System Programming (ISP) through a JTAG tool provides a simple way of configuring non-volatile memory during or after PCB assembly. XJDeveloper can be used to perform In-System Programming of flash and FPGA/CPLDs.
JTAG can be used to configure programmable devices of any size, by serially shifting address, data and control information through the JTAG chain to the relevant device. This is perfect for smaller devices such as EEPROMs that contain a serial number, for example. However, using this method for in-system programming larger images, such as an entire file system, would lead to programming times that are too long for a production environment. The answer to this is hardware-accelerated programming.
XJTAG has used its expertise in JTAG to offer industry-leading solutions to engineers who are faced with the challenge of delivering faster hardware-accelerated programming over a boundary scan interface. This may involve the temporary reconfiguration of an FPGA on a board as an ‘in-system programmer’. This advanced technique allows XJTAG to program large non-volatile flash memories, with the speed often being limited by the device being programmed. XJTAG calls this solution XJFlash. It has been shown to result in programming cycle times that are 50 times faster than just using boundary scan test. In some cases, the programming times are even faster than a manufacturer’s published figures.
XJDeveloper offers a range of acceleration options, including XJFlash for programming using FPGAs or CPLDs, and XJDirect, which programs using an on-board CPU or Microcontroller. Other applications may have more unusual requirements, and for such boards, XJTAG offers a consultancy service to develop bespoke solutions. Any programmable devices on a board can be used to deliver the desired results at high speed. Please contact us if you would like to know more.
- Advanced Interconnection Test
Tests a higher percentage of your circuit than most other JTAG solutions and provides high precision fault isolation.
- Testing and programming non-JTAG devices
Non-JTAG devices connected to devices on the chain can be manipulated just as easily as those on the chain, for advanced testing – e.g. ethernet loopback.
- Flexible, high-level, test description language
Designed to simplify the process of test creation.
- Device-centric approach
Device tests can be reused in different circuits without modification.
- High-level conditional test execution
Determine whether to run tests based on board configuration, results of previous tests etc.
- Built-in Test Library
A large number of standard parts available in the installed XJEase library.
- Layout Viewer to show the physical location of circuit elements and faulty nets.
- Schematic Viewer to show circuit functionality whilst developing or debugging tests.
- Open test implementations
Users can view the data driven during connection test, and view or edit code from the XJEase library.
- Waveform View
View a graphical representation of waveforms in XJEase testing and in the Analyser screen.
- XJEase software debugger
Step through XJEase code, set breakpoints and examine variable values to speed up your test development.
- No need to understand how JTAG works
The XJTAG system works out how to drive the JTAG chains for you.
- Program devices in-system
SVF and STAPL files can be run from XJDeveloper to program devices, or XJEase scripts can be used to program an image directly.
- Testing with no netlist
Run connection test and non-JTAG device tests even on boards where you don’t have the netlist.
- Export projects to XJRunner
XJRunner projects prevent modification of the tests for deployment to manufacture.
- Test coverage analysis
Analyse and generate reports on the test coverage achieved on your circuit.
- 1149.6 support
Supports 1149.1 and 1149.6 devices
Frequently asked questions
What is included with XJDeveloper?
- Test development capabilities
- BSDL file editor/viewer
- JTAG Chain Debugger and signal integrity testing
- Library of non-JTAG testable devices
- Library of logic devices and truth tables
- XJEase language – ability for user to create new tests/modify library tests
- XJEase software debugger
- Ability for user to add connections/remove connections from netlist
- Schematic viewer
- Layout viewer
- Waveform viewer
- XJRunner – integrated in XJDeveloper and as separate XJRunner application
- XJDemo board & tutorials
What options are available with XJDeveloper?
What files / data do I need to start working with XJDeveloper?
The minimum needed is the BSDL file for at least one of your JTAG devices (available from the device manufacturer).
Results will be much better and test coverage easier to achieve if you have a netlist for the board you wish to test. This is usually exported from the board design (EDA) tools.
If your EDA tools support export in ODB++ format, by using this as the netlist, XJDeveloper will also have access to layout information on your board to improve how it shows you problems.
If you have a Bill of Materials (BoM) for your design, XJDeveloper can use the information in it to help you improve your setup and save time in deciding how to categorise devices.
Providing the schematics (in PDF format) to XJDeveloper also allows it to help better during board setup.
You do not need the board you wish to test in order start the setup, though you will want to verify your tests on real hardware at some stage.
What netlist formats does XJDeveloper support?
Our recommendation is that customers use ODB++ board data because this contains both netlist and layout information and almost all CAD tools can generate ODB++. However, XJDeveloper supports over 90 formats of netlist, so if you do not have ODB++ we simply suggest you try using yours. If XJDeveloper does not recognise it please send it to us, we will gladly convert it to one that we can support, and we will also add support for your format into the next release of XJTAG software.
Can I update the netlist on an existing project?
Yes, simply edit the board to use the new netlist. XJTAG will migrate all the existing setup to the new netlist.
I have modified the board during bring-up – can I represent this in XJTAG?
XJTAG has the ability to add connections (e.g. wire mods) to the circuit model, or to disconnect parts of the circuit (e.g. cut tracks) in addition to being able to mark devices such as resistors and connectors as fitted or unfitted.
How easy is it to write my own tests?
We think it is very easy. But mostly you won’t have to, because the XJEase library contains a large number of common devices such as RAM, Flash, etc.
The XJEase language is designed so that you work by thinking about the device you are testing, so if for example you want to set the nOE pin high on a chip, that is how it is described in XJEase (SET nOE := 1; ) No need to worry which JTAG device the pin is connected to, or how it is connected, XJTAG works that out for you.
The XJEase language means you can do more than just play back a pre-defined set of vectors – you can use IF or WHILE statements to make decisions during tests, and even call other programs from within the tests.
The library of tests provided with XJEase contains a wide selection of devices, and you can see all of the XJEase source code for these tests. So if you want to find out how to do something for a new device, look in the tests we supply for a similar device, and copy or modify it.
The XJEase library also contains functions for using protocols such as I2C or SPI, and useful functions for tasks such as reading programming information from files in various formats, doing maths operations, etc.
What test coverage can I get using XJTAG tools?
The best answer we can give is to suggest you try XJTAG and let XJDeveloper generate a test coverage report for your circuit. XJDeveloper can also give some indications of parts of the board which are not tested or for which testing could be improved.
If you would like to take advantage of a free DFT Coverage Review of your initial design, our experienced test engineers will be happy to provide an analysis of boundary scan testability and make suggestions for improvements to maximise test coverage. Contact us now.
- Intel® Core i3, i5, i7 processor or equivalent (any generation)
- Microsoft® Windows® 7, Windows 8.1 or Windows 10 (32 or 64 bit)
- 4 GB of RAM
Upgrades / Support / Maintenance
Can I upgrade to add XJAnalyser or XJFlash later?
Yes, upgrading is simple and our costs are transparent with no penalty for adding functionality at a later date.
What support does XJTAG offer?
XJTAG offers technical support by email and telephone during UK office hours.
Where appropriate we will use internet meeting/telephony software to view problems directly on a customer’s PC, or to demonstrate the use of a feature by showing a PC desktop to the customer.
Customers with a support + maintenance agreement have access to both bug-fix software releases and new-feature releases.
In the event of a fault developing in XJTAG’s hardware XJTAG will replace or repair the unit and will work with the customer to minimise downtime (e.g. by loaning a unit during the repair).
Free evaluation / Licensing
What are the differences between the trial version and the purchased product?
There is no difference between the functionality of the purchased product and the free evaluation version. We provide full technical support by telephone and email, to help with the set-up or troubleshoot any issues during your trial. You will also have access to XJTAG’s device test libraries and latest software upgrades, during your 30-day evaluation period.
Can I convert my trial version to a purchased product?
Yes. If you already have XJDeveloper for evaluation, you can continue using it without interruption by purchasing the full licence. Contact your XJTAG distributor to make a purchase and have your licence extended.
- Fast test development & debug
- In-system programming setup
- Test coverage analysis
- Library of non-JTAG devices
- Reduce your time spent debugging boards due to high precision fault isolation
- Improve your time to market and reduce project risk by early design verification
- Reduce your test development time by reusing tests from prototype/design in manufacturing and field support
- Ongoing time savings by test reuse across projects