The SVF, or Serial Vector Format, was developed as a vendor-independent way of representing JTAG test patterns in ASCII (text) files.
SVF files consist of a list of statements and/or comments. Here’s an example statement:
SDR 64 TDI(0) TDO(0123456789ABCDEF) MASK(0FFFFFFFFFFFFFFF);
This will scan 64 bits out from the data registers of devices in the JTAG chain, scanning in 64 zeros and expecting to read 0x0123456789ABCDEF out, with the mask of 0FFFFFFFFFFFFFFF indicating that the first 4 bits are not significant, but all the rest are.
Headers and trailers can also be set up, enabling you to target a specific device, or set of devices, in the JTAG chain without having to consider the other devices in the chain at each step.
The complete list of SVF commands is as follows.
|Specifies default end state for DR scan operations.
|Specifies default end state for IR scan operations.
|Specifies maximum test clock frequency for IEEE 1149.1 bus operations.
|(Header Data Register) Specifies a header pattern that is prepended to the beginning of subsequent DR scan operations.
|(Header Instruction Register) Specifies a header pattern that is prepended to the beginning of subsequent IR scan operations.
|(Parallel Input/Output) Specifies a parallel test pattern.
|(Parallel Input/Output Map) Maps PIO column positions to a logical pin.
|Forces the IEEE 1149.1 bus to a run state for a specified number of clocks or a specified time period.
|(Scan Data Register) Performs an IEEE 1149.1 Data Register scan.
|(Scan Instruction Register) Performs an IEEE 1149.1 Instruction Register scan.
|Forces the IEEE 1149.1 bus to a specified stable state.
|(Trailer Data Register) Specifies a trailer pattern that is appended to the end of subsequent DR scan operations.
|(Trailer Instruction Register) Specifies a trailer pattern that is appended to the end of subsequent IR scan operations.
|(Test ReSeT) Controls the optional Test Reset line.