See what you get with your XJTAG system.
XJTAG Development System
|Fully Integrated Development Environment (IDE) for creating and debugging JTAG-based test and programming systems|
|Integrated Development Environment for creating JTAG test and programming systems||Integrated test and debug environment for board repair/rework||Real-time visual analysis and debugging tool for devices in your JTAG chain||Run-time production test environment for executing XJDeveloper systems|
|Learn more||Learn more||Learn more||Learn more|
|Test & Programming Development||✓|
|Test & Programming Execution||✓||✓||✓|
|Graphical Pin Display & Control||✓||✓|
|Model Library for non-JTAG Devices||✓|
|Interconnect / Connection Test||create + run||run||run|
|Detailed Fault Description||✓||✓||✓|
|Flash Programming||create + run||run||run|
|FPGA/CPLD Programming||create + run||run||create + run||run|
|Test Coverage Analysis & Reports||✓|
|XJFlash Compatible||create + run||run||run|
|XJDirect Compatible||create + run||run||run|
|External DLL calls||create + run||run||run|
|Testing Without Netlist||create + run||run||run|
|Logic Device Support||create + run||run||run|
|Fault Dictionary||create + run||create + run||create + run|
|3rd Party Integration||✓|
|Golden Scan / Board Comparison||✓||✓|
|XJDemo Board & Tutorials||✓||✓||✓||✓|
|JTAG Chain Debugger||✓||✓||✓||✓|
|Support & Maintenance||✓||✓||✓||✓|
|Number of JTAG Controllers||1||1||1||1||1||1||4||1|
|TAPs per JTAG Controller||4||4||4||4||4||4||4||1|
|GPIO on Pins||✓||✓||✓||✓||✓||✓||✓|
|Adjustable JTAG Signal Termination||✓||✓||✓||✓||✓||✓||✓|
|Automatic Signal Skew Control||✓||✓||✓||✓||✓||✓||✓||✓|
|Adjustable Signal Slew||✓||✓||✓||✓||✓||✓||✓|
|Button to Start Tests||✓||✓|
|Visual Indication of Test Status||✓||✓||✓|
|TCK Frequencies (up to)||166 MHz||166 MHz||166 MHz||166 MHz||166 MHz||166 MHz||166 MHz||50 MHz|
|Waveform & Function Generator||✓|
|Serial Protocols Analyser||✓|
|Connection||USB||USB||PXI||SPEA 3030||Keysight (Agilent) i3070||Teradyne TestStation||USB||USB|
XJTAG Development Systems
By adding XJAnalyser functionality to standalone XJDeveloper, the XJTAG Development System is an Integrated Development Environment (IDE) for the development and debugging of JTAG-based test and programming systems.
The XJTAG Professional Development System is supplied with an additional XJIO test extension board that allows you to improve test coverage and fault diagnosis.
XJDeveloper offers an intuitive graphical interface for developing JTAG based test and programming systems for your prototype and production boards.
The integrated Schematic and Layout Viewers and proprietary Netlist Explorer help you understand the both the physical and logical structure of the board during development, while the embedded XJRunner allows you to run and debug these systems against your hardware.
Once you have a completed system, you can review the test coverage using the automatic DFT analysis tool. Learn more »
XJInvestigator is an integrated test and debug environment for board repair/rework. It allows you to quickly diagnose manufacturing problems on failing boards and re-run the full production line JTAG tests after any re-work.
XJInvestigator combines the repeatable, automatic testing of XJRunner with the graphical, interactive debug capabilities of XJAnalyser and offers extra diagnostic functionality not normally available on the production line. Learn more »
XJAnalyser is a visual analysis and debugging tool for devices in your JTAG chain. It offers an interactive, graphical interface to view and control of pins on the JTAG devices on a Unit Under Test (UUT). Learn more »
XJRunner is a run-time, production test environment for executing XJDeveloper test and programming systems. It offers an easy-to-use interface for use on a production line as well as the capability to select and loop individual tests when debugging boards that fail the full test.
XJRunner can log all test results for quality control / audit. Learn more »
Test & programming development
In order to use the capabilities of JTAG for testing and programming a Unit Under Test (UUT) it is first necessary to develop a project based on the design information for that board. The XJTAG software application used for this development is XJDeveloper.
Test & programming execution
Once a JTAG based test and programming system has been developed for a Unit Under Test (UUT) it is necessary to execute that system. Initially this will be for debugging the developed system, which can be done using XJDeveloper, and later for production testing where XJRunner would be used.
Graphical pin display & control
The flexibility to take direct control and monitor the state of any pin on a JTAG enabled device – even balls under BGA devices – gives engineers a really useful extra tool when trying to debug a problem board. Two of the ways this functionality can be used to help debug a board are driving one JTAG enabled pin and monitoring another to which it is meant to be connected, and driving a pin through JTAG and monitoring using other test equipment (such as a DVM or oscilloscope).
XJAnalyser, or the Analyser screen in XJDeveloper use a graphical representation of the JTAG devices on a Unit Under Test (UUT) to give complete control on a pin-by-pin basis of both pin state (either as an input or driven as an output) and pin value (either high, low or toggling fast or slow when outputting).
Model library for non-JTAG devices
When building a JTAG based test and programming system the JTAG enabled devices are associated with BSDL files that describe their JTAG implementation. The other devices on a Unit Under Test (UUT) also need to have descriptions so the system knows how it should deal with them.
XJDeveloper is supplied with libraries containing models for three device types, simple passive devices such as resistors, devices that can be described using a truth-table such as buffers and logic gates and more complex devices that require specific test algorithms.
The models for more complex devices, including Flash, RAM, Ethernet, A/D, Logic, I²C, SPI and PCI, are written in the high level test description language XJEase. The full source code for most devices is freely available.
The connection test will automatically take the design information for your board, along with the models that have been assigned to the individual components, produce a set of tests to look for short circuit, open circuit, stuck-at and pull resistor faults.
XJTAG’s proprietary connection test algorithm will test a higher percentage of your circuit than most other JTAG solutions.
High precision fault isolation diagnostics, supplied as a standard part of every system, highlight the type of fault found, the nets and pins involved and provide links into the layout and schematic of the board to help the engineer repairing the board.
Detailed fault description
When running tests, XJTAG provides detailed information about the location and precise nature of any faults that are found. Clickable links to the Schematic and Layout Viewers assist the user to understand or visualise the faults on a board.
External flash memories can be programmed indirectly through their connection to devices in the JTAG chain.
If programming via boundary scan, it is best to try and minimise the amount of data to be programmed as programming large amounts of data can be slow (particularly for serial flash devices).
Programming the internal flash memory in a processor may be possible using XJDirect.
All FPGA/CPLD manufacturers provide tools for developing the applications to run in these devices. These tools can also export programming files in either Serial Vector Format (SVF) or Standard Test And Programming Language (STAPL) that can be run in XJTAG.
Understanding the logical function of an area of a circuit and the exact physical location of a device, net or pin can be very useful when debugging a failing Unit Under Test (UUT).
Both viewers are also extremely helpful when configuring a project, especially if this is not being done by the designer of the board.
The Waveform Viewer displays data in the form of digital waveforms, representing a live and correlated view of JTAG chain data.
While Boundary Scan can’t claim to capture the point at which signals transition in real-time, Waveform Viewer provides a logic analyser-type view of your system’s digital activity, as it is captured by the Scan Chain. This brings several new and valuable capabilities to the debug and fault diagnostic process.
The Waveform Viewer is a standard feature in XJAnalyser and included as part of XJInvestigator and the XJTAG Development System.
Test coverage analysis & reports
XJDeveloper automatically analyses the test coverage that will be achieved by your XJTAG test system. This information can be exported for management reporting or interactively interrogated in order to fully understand which elements of a DUT are being tested – potentially highlighting opportunities to extend coverage using XJTAG or other test technologies.
XJDeveloper contains a software debugger for use during XJEase development and prototyping. The XJEase debugger features a variable watch window and breakpoints to help get your tests running as quickly as possible. This debugger allows you to step through code a line at a time; set and remove breakpoints as well as checking and setting the values of any variables in the code.
You can program flash connected to an FPGA at speeds close to the theoretical maximum – XJFlash can provide up to 50-fold improvement in programming speeds over boundary scan.
XJFlash configures the FPGA on your board to be a custom flash programmer. Data is then streamed into the FPGA through its JTAG port and from there programmed into the target device.
An additional license is required to add XJFlash to an XJDeveloper project.
XJDirect allows you to use the Test Access Port (TAP) on a JTAG-enabled device for functions other than boundary scan – such as programming the internal flash on a processor.
Many processors use JTAG as the protocol to access their debug/emulation capability. This functionality is not documented in the Boundary Scan Description Language (BSDL) file so cannot be automatically offered by XJTAG but with XJDirect you can write and read registers to configure the device ready for boundary scan testing, take ADC measurements, and program the internal flash.
External DLL calls
External DLL calls allow you to access the functionality of other programs or test equipment from within an XJDeveloper / XJRunner test system.
Any functionality that can be accessed via an Application Programming Interface (API) can be called either directly or via a simple wrapper DLL from within XJTAG.
Testing multiple boards is as easy as testing a single board. There is no complex merging to be done; simply give XJDeveloper the individual netlists and tell it how the boards are connected together.
The BSDL Editor allows you to view and edit BSDL and custom cell type package files within XJDeveloper. The editor also shows you a summary of information contained in the BSDL file, including the IDCODE, TCK frequency, boundary scan register length and device manufacturer.
If you don’t have connectivity data for a board you need to repair, XJDeveloper allows you to base a test system on the BSDL files for the JTAG devices on the board rather than forcing you to use a netlist. The system can then automatically learn from a working board the connections between the JTAG devices for use during connection test.
You can also add additional non-JTAG device such as RAM, flash or devices on peripheral busses such as I²C and SPI, in order to extend the test coverage.
Logic device support
In circuits containing standard logic devices an XJTAG test system will automatically attempt to exercise those devices in the connection test, and may also use the devices to carry out SET statements in your XJEase Test Device Files. XJDeveloper has a comprehensive library of logic device models installed, as well as an editor to create custom definitions as required.
The fault dictionary is used to display helpful information to users, particularly in the production environment, when common faults are found on a board. A fault can be as simple as a single test failing, or can be made dependent on a particular combination of return values from a large number of your functions.
The message you set will be displayed in the XJRunner output after testing when all these conditions are met. This can be used to give instructions to basic users as they need them, but where it really shines is giving more detailed information to help engineers quickly and efficiently repair a common fault on your board.
Rather than using XJRunner, many customers want to have a common test executive to run XJTAG tests as part of a wider system that includes other technologies. This could be a standard package such as LabVIEW™ or LabWindows™ from National Instruments, some vendor specific ATE control software or a completely bespoke application written in a language such as Visual Basic .NET or C#.
These integration requirements are normally met using a .NET DLL that is supplied with XJRunner and XJDeveloper. For older systems that cannot make calls into this .NET DLL, XJTAG functions can also be run from a DOS command line.
Golden scan / Golden board comparison
Highlighting differences between a board exhibiting unexpected behaviour and a working ‘golden’ reference board can be very helpful when debugging.
XJInvestigator, XJAnalyser and the Analyser screen in XJDeveloper can capture the values being driven onto the JTAG devices on a Unit Under Test (UUT). These values can then be compared to the values stored in the XJTAG project, having previously been captured from a ‘golden’ reference board.
The XJDemo board contains a mixture of JTAG enabled devices (CPLD and microprocessor) and standard peripherals including SRAM, flash, ADC and EEPROM. The interactive tutorials guide you through developing your first test system with XJTAG.
JTAG testing can only be used if the JTAG infrastructure is working correctly. The JTAG chain debugger will give you the information to investigate and resolve problems where this is not the case, such as an unconnected TAP signal, which would stop data passing from TDI to TDO, or a glitch on TCK, which would shift data from its expected location.
Support & maintenance
Customers in maintenance contracts have access to unparalleled email and phone technical support, new feature releases and bug-fix updates.
An additional license is required to add XJFlash to an XJDeveloper project.
Portable boundary scan test solution that comes with:
- Built-in Digital Oscilloscope
- Waveform and Function Generator
- Spectrum Analyser
- Serial Protocols Analyser (CAN, I2C, SPI, RS232, UART)
Enhanced portable USB JTAG controller for benchtop development and test. Easy to connect to a wide range of circuit boards.
- 4 TAPs, multi-voltage
- Lightweight & portable
- Configurable JTAG port
PXI JTAG controller, XJLink2 compatible.
Fits into a PXI rack for National Instruments LabVIEW™, LabWindows™ or TestStand™ integration.
XJLink2 integration into Keysight (Agilent) i3070™ ICT machines.
- Fully integrated into the BTBasic environment
- Fits into one slot on the Keysight (Agilent) i3070 utility card
- Optionally fit multiple XJLink2 3070s per utility card
XJLink2 integration into Teradyne’s TestStation™ In-Circuit Test Systems.
- XJLink2-CFM fits into one slot on the Teradyne Multi-Function Application Board
- Optionally fit one or more XJLink2-CFMx expander cards for maximum connectivity (three CFMx cards supplied)
4-port version of XJLink2 for volume manufacture testing.
- Supplied with XJRunner software.
- Connects to four JTAG chains on each controller.
- Can be used for testing four boards simultaneously or independently.
- Legacy project support. Single TAP, single voltage.